ajay kumar dharmireddy

@sircrrengg.ac.in.

Associate Professor, Department of E.C.E
ajay kumar dharmireddy



                       

https://researchid.co/ajaykumardharmireddy

EDUCATION

Kumar Dharmireddy received the B. in Electronics and Communication Engineering from JNTU University of Hyderabad, India, the M.E. degree in VLSI Design from the Anna University, Coimbatore, India and the Ph.D. degree in hybrid device modeling from The GITAM University of Vishakapatanam, India. His researches interests include VLSI design, device modeling, Machine learning, image/signal processing, biomedical and IOT. He used to hold several administrative posts with the Sir C.R.Reddy College of Engineering, India from 2010 to upto this time, including the M.Tech is currently a Associate Professor with the Department of Electronics and Communication Engineering in Sir C.R.Reddy College of Engineering, Andhra Pradesh, India. He has authored or coauthored more than 50 publications: 12 proceedings and 35 journals, with 11 i10 index, 14 H-index and more than 245 citations.

RESEARCH, TEACHING, or OTHER INTERESTS

Engineering, Multidisciplinary, Computer Engineering

FUTURE PROJECTS

MOSFET DEVICE MODELLING USING MACHINE LEARNING

In the realm of electronics, device modeling is an essential endeavor that aids in forecasting how devices will behave in different scenarios. In this brief, a neural network-based machine learning framework for modeling the MOSFET transient characteristics curve is presented. Gate length (L), width (W) and oxide thickness (Tox), channel doping concentration, and source/drain doping concentration are input variables for our machine learning (ML)-based MOSFET device model. The model is trained on TCAD-generated datasets, capturing complex relationships and ensuring high accuracy while significantly reducing computational costs. Compared to conventional methods, this approach accelerates modeling, enhances scalability, and adapts to future semiconductor device designs. By bridging the gap between physics-based simulations and machine learning, this work contributes to efficient transistor modeling and advances semiconductor research.


Applications Invited
collaborators

Modeling and Characterization of Hybrid Device for High Speed and Low Voltage Applications

In traditional MOSFETs, below 45nm technology, device scaling is a big challenging task because it results severe short channel effects (SCEs). The causes of this are, the ratio between operating voltage and the thermal voltage shrinks with scaling down of MOSFET. This leads to higher leakage currents stemming from the thermal diffusion of electrons, and poor electrostatic control of gate over the channel, and In planar devices drive strength is dependent on the channel width. Deep research on this issue results many non-classical devices which have good electrostatic control over the channel, thereby greatly minimizes SCEs and allows the progress of device scaling . Double gate FET, multi gate FinFET, and Tunnel FET are the resulting devices. Sub-threshold slope(SS), on state current and off state currents are the design parameters to measure the device performance. In Low power -High speed electronic circuits, the devices with more steeper characteristics are required. The speed o


Applications Invited
collaborators
23

Scopus Publications

Scopus Publications

  • Low-Power 12T SRAM Design Using 18 nm FinFET Technology
    Ajaykumar Dharmireddy, I. Hemalatha, B. Veera Kumar, K.Havella Raj, and K. Veerannababu

    FOREX Publication



  • Design and Implementation of 10 Bit SAR ADC for High speed applications
    Ajaykumar Dharmireddy, H. Sudhakar, N.M. Vitaleswara Rao, I.S.H. Sravya, K. Haveela Raj, and M. Jagadeesh Kumar

    IEEE

  • Pesticide prediction and disease identification with AIoT
    Ajay Kumar Dharmireddy, Kambham Jacob Silva Lorraine, Ravi Kumar Maddumala, and Kotha Lavanya

    BENTHAM SCIENCE PUBLISHERS
    Agriculture is vital to human survival and has a significant impact on the economy of any nation. Crop protection costs millions of dollars per year. Insects and other pests pose a serious threat to the health of a harvest. Excessive use of chemical fertilizers and pesticides negatively affects the crop and soil quality. Therefore, one way to safeguard the harvest and mitigate potential losses is through early identification of the pests. Examining the crop at the right moment is the best technique to determine its overall health. While manual inspection is the standard way of conducting field inspection, it becomes challenging for large fields. In addition, manual inspection would be exceedingly expensive and tedious. To address this, an automated system is needed to detect pests, identify them, and recommend appropriate fertilizers using an IoT system. Therefore, automated pest detection has become a major focus for researchers globally, as it offers a more efficient and cost-effective alternative to manual inspection. In this work, a smart agriculture system has been proposed that monitors crops, identifies pests, and allows remote control. The dataset comprises over 4000 images of corn leaves, categorized into rust, blight, grey spots, and healthy leaves. By employing Convolutional Neural Networks (CNN), the system has achieved a remarkable 99% accuracy in pest detection.

  • Implementation of Delayed LMS Algorithm Based Adaptive Filter using Verilog HDL
    Sreenivas Rao Ijjada, Ajay Kumar Dharmireddy, P. Sai Ram Prasad, and P. Sai Babu

    AIP Publishing
    This paper focuses on the implementation of Delayed Least Mean Square algorithm based Adaptive filter in Verilog HDL. The structure of Least Mean Square (LMS) algorithm based Adaptive filter is briefly discussed and an improved, efficient structure for the LMS algorithm, called Delayed LMS algorithm (D-LMS) is proposed. Necessary building blocks for the design of D-LMS Adaptive filter, such as block carry look ahead adder and multiplier are presented. The implemented D-LMS Adaptive filter is synthesised and compared with the LMS algorithm based adaptive filter to display the faster convergence of the D-LMS algorithm.

  • Surface potential model of DM Fin TFET for steeper slope characteristics
    Ajaykumar Dharmireddy, H. Sudhakar, Ch. Madhavarao, and Y. Ganeesh

    AIP Publishing

  • Arduino based GPS tracking alert system for women's protection
    A. Chakradhar, Ajaykumar Dharmireddy, H. Sudhkar, K. Lavanyai, M. Vamsi Krishna, C. H. Madhava Rao, and P. Hareesh

    AIP Publishing

  • Dermatological disease detection and preventative measures using deep convolution neural networks
    Ajaykumar Dharmireddy, A. Chakradhar, Sk. Vaseem Akram, R. Sai Deepak, S. Akash, T. Rajasekhar, and T. Anatha

    AIP Publishing

  • Implementation of Feature-Based Medical Image Retrieval (FBMIR) Through a Deep Convolutional Neural Network (CNN)
    Sreenivasa Rao Ijjada, Ajaykumar Dharmireddy, Chakradhar Adupa, M. Greeshma, and G. Gokul

    Springer Nature Singapore

  • High Switching Speed and Low Power Applications of Hetro Junction Double Gate (HJDG) TFET
    Ajaykumar Dharmireddy and Sreenivasarao Ijjada

    FOREX Publication
    Tunnel field effect transistor (TFET) technology is unique of the prominent devices in low power applications. The band-to-band tunnel switching mechanism is sets TFET apart from traditional MOSFET technology. It helps to reduce leakage currents. The major advantage is the Sub threshold slope smaller than 60mv/decade. Newer technologies are expected to change the gate, architectures, channel materials and transport mechanisms. In this point of view tunnel FET has to play the most imminent role in the least leakage current and also need to overcome limitations of drive current in TFET. The proposed model of hetero junction double gate TFET has attain superior ON state current, low off-state current and better steeper slope i.e., 4.94 x10-5A/µm, 32.3 x10-17A/µm 28.3mv/decade as compared with single gate hetero junction TFET and conventional device. This proposed design suitable for high switching speed and low power application.

  • Performance Analysis of Variable Threshold Voltage (ΔVth) Model of Junction less FinTFET
    Ajaykumar Dharmireddy and Sreenivasarao Ijjada

    FOREX Publication
    The work presented in this paper is a variable threshold voltage (ΔVth) model of junction less fin gate tunnel FET (JL FinTFET) in which there is a shift in threshold voltage. As a result, to improve drive current and subthreshold slope among other devices. At the same time, gradually decrease the random dopant fluctuations (RDF) effects on Vth, ambipolar leakage current by using this design. The threshold voltage in the junction less fin gate TFET may be modified using 2D numerical simulations by supplying a voltage to the variable gate. The effects of the threshold voltage change on the device's overall performance investigate. A GaSb junction less fin gate TFET and AlGaSb junction less fin gate TFETs with variable threshold voltage characteristics compare. The ON state current is 1.5x10-3 A/m, the SS is 17.1 mV/decade, and the Iamb is 3.314x10-17 A/m.

  • ANTI-THEFT FINGERPRINT SECURITY SYSTEM FOR MOTOR VEHICLES
    K. Shashidhar, Ajay kumar Dharmireddy, and Ch. Madhava Rao

    CRC Press

  • SOFT SENSOR-BASED REMOTE MONITORING SYSTEM FOR INDUSTRIAL ENVIRONMENTS
    Ajay kumar Dharmireddy, P. Srinivasulu, M. Greeshma, and K. Shashidhar

    CRC Press

  • Azolla Crop Growing Through IOT by Using ARM CORTEX-M0
    Ajaykumar Dharmireddy, M. Greeshma, Srinivas Chalasani, S.Tharani Sriya, S.Bala Ratnam, and Sk. Sana

    IEEE
    Nowadays agriculture plays a major role in the Indian economy. Farmers are the backbone of the agriculture field. As you know there molka plants are grown up along with the crops. By the way, it takes nitrogen and some other nutrients from the crop, and for these reasons, the yield will decrease. All of those reasons we should decide to cultivate the ‘‘Azolla’’ plant. By cultivating the Azolla plants we have to maintain the temperature and pH level of water. Basically, Azolla gives 30% nitrogen to the crop and it will kill the molka plants. Feeding this Azolla to the buffaloes increases the quality of the milk and increases the production of the milk. By collecting the readings we can use the microcontroller, pH sensor, and Wi-Fi module, and then we can send the data through the website by using the Wi-Fi module.

  • Design of Low Voltage-Power: Negative capacitance Charge Plasma FinTFET for AIOT Data Acquisition Blocks
    Ajaykumar Dharmireddy and Sreenivasa Rao Ijjada

    IEEE
    The advancement of technological improvement are revved up to introduce the notion of Artificial Intelligence of Things (AIOT) to eliminate human interaction in operation of the machine and thus improve data throughput and big data potential. Lower voltage-power operation and higher performance are the goals of AIOT hardware design. As a result, future AIOT hardware devices will focus on the fabrication of rad-hard and steeper slope transistors, as well as high drive on-state and low ambipolar currents. These design features will help AIOT apps become more sophisticated. Tunnel FETs are the most effective at reducing leakage current, but the equivalent current must be increased. To ensure high drive and low leakage currents, this work incorporates both negative capacitance and charged plasma principles into the Tunnel FET design. The goal of this research is to construct a Negative Capacitance Charge Plasma Fin Gate TFET, and Centaurs TCAD simulations are used to examine the properties. As a result, the perspective model potentially achieve a subthreshold swing of less than 20 mV/decade and a switching voltage of less than 0.2 V, as well as the highest on current and lowest ambipolar leakage current. Using the suggested devices to implement current mirror and cascade current mirror circuits can lead to the most efficient, tolerant, and minor circuits with adjustable properties, which are critical for the intend of low-power and high-speed data collecting systems in AIOT applications.

  • Performance Analysis of Various Fin Patterns of Hybrid Tunnel FET
    Ajay Kumar Dharmireddy, Dr Sreenivasa Rao Ijjada, and Dr I. Hema Latha

    FOREX Publication
    High speed and low power dissipation devices are expected from future generation technology of Nano-electronic devices. Tunnel field effect transistor (TFET) technology is unique to the prominent devices in low power applications. To minimize leakage currents, the tunnel switching technology of TFETs is superior to conventional MOS FETs. The gate coverage area of different fin shape hybrid tunnel field-effect transistors is more impacted on electric characteristics of drive current, leakage current and subthreshold slope. In this paper design various fin patterns of hybrid TFET devices and shows on better performance as compared with other fin shape hybrid tunnel FET. The TCAD simulation tool is used to determine the characteristics of different fin shape tunnel FET.

  • Detection of COVID-19 from X-RAY Images using Artificial Intelligence (AI)
    Ajaykumar Dharmireddy, A. Surya Manohar, G.T.Sri Hari, G. Gayatri, A. Venkateswarlu, and C. Tejeswar Sai

    IEEE
    Corona virus (COVID-19) is an infectious disease. Several millions of people worldwide suffer from this disease. The signs of progress of virus infection are more severe damage to lungs and causes to organs failure, death. X-rays are readily available and an excellent alternative method to x-ray imaging in the diagnosis of covid-19 and very crucial role play to recognizing this disease and recovery with hospitalization. The goal of this revise is to expand a reliable method for detecting COVID-19 from digital chest X-ray pictures using well-before deep-learning algorithms while optimizing detection performance. To train and verify, the transfer learning (TL) approach was utilized with the aid of picture extension. Current would be hugely beneficial in this pandemic because the illness severity and the necessity for prevention methods are at odds with available resources.

  • Rad-Hard Model SOI FinTFET for Spacecraft Application
    Ajay Kumar Dharmireddy, Sreenivasa Rao Ijjada, K. V. Gayathri, K. Srilatha, K. Sahithi, M. Sushma, and K. Madhavi

    Springer Nature Singapore

  • A Novel design of SOI based Fin Gate TFET
    Ajaykumar Dharmireddy and Sreenivasa Rao Ijjada

    IEEE
    The steeper transistors with low power and fast speeds are the major issue of future transistors. To continue the progress of new technology used a different combination of channel materials, device architectures, and transport mechanisms. In this point of view tunnel FET plays the most imminent role in providing the least leakage current but there is a necessity to increase drive current. The Fin gate TFET structures are designed and analyzed. In Silicon on insulator (SOI) based on Fin gate tunnel, FET the ambipolarity and unacceptable increment in OFF current along with ON current are addressed. The SOI Fin gate tunnel FET architecture has shown improved electrical parameters along with other exiting TFET devices.

  • Design of A NEMS cantilever sensor for explosive detection
    , P.V.T Lokesh Kumar, Dr.P.H.S Tejomurthy, , Dharmireddy Ajay Kumar, and

    Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
    The particular recognition of explosives in countering fear monger dangers and follow explosives has turned into an appallingly progressed and expensive exertion. This happens because of different impacts, similar to the extensive broad assortment of materials which will be used as explosives, the deficiency of basically perceivable marks, and the monstrous assortment of roads by these weapons might be sent and consequently there will be absence of shoddy sensors with high sensitivity and low vapor analyte property. High sensitivity and property joined with the power, to cut down the orchestrating cost of sensors. Misuse age is basic in winning the war an explosives based demonstration of psychological warfare. Nanosensors can possibly satisfy every one of the necessities of an effective stage for the follow identification explosives. Enhance the sensitivity and selectivity of NEMS cantilever for piezo resistive material in Humidity conditions and manufacture Rectangular Shape Omni directional NEMS cantilever cheap IC and Characteristic chip with Real time reenactment utilizing omnicant.

  • Performance analysis of Tri-Gate SOI FINFET structure with various fin heights using TCAD Simulation


  • Implementation of bi-directional blue-fi gateway in IoT environment
    P Gopi Krishna, K Srinivasa Ravi, P Hareesh, D Ajay Kumar, and H Sudhakar

    Science Publishing Corporation
    In the world of possibilities, IoT is playing a crucial role in development and automation of things which is making life easier, comfortable and most importantly reliable. This paper implements a new IoT Gateway, BLUE-FI designed to allow interconnection between Bluetooth and Wi-Fi protocols. This gateway gives us significant advantages. It enables us to transfer data between Bluetooth and Wi-Fi devices by renovating the protocols making it more simple and reliable, which obtains information from various sensors and convert them into a uniform format. With the huge possibilities in IoT, this paper implements an application of Blue-Fi gateway through Smart health monitoring system (SHMS). Here in SHMS we use different components to help us determine the health of a patient which is updated real time. This information, i.e., Bio-metric data is transferred to concerned Doctor and is also saved in cloud for future references in diagnosis. Our proof of notion demonstrates the performance and ability of the Bi-Directional Blue-Fi through smart health monitoring system (SHMS).

RECENT SCHOLAR PUBLICATIONS

    Publications

    Ajay kumar D, Ijjada Srinivasa Rao, , “Performance analysis of Tri-gate SOI FinFET structure with various fin heights using TCAD simulations”, Journal of Advanced Research in Dynamical and Control Systems,Vol. 11, issue no.2, pp-1291-1298, 2019
    Ajaykumar Dharmireddy and Sreenivasarao Ijjada, “Performance Analysis of Variable Threshold Voltage (ΔVth) Model of Junction less FinTFET”. International Journal of Electrical and Electronics Research(IJEER) , , issue no.2 323-327. 2023. DOI: 10.37391/.
    Ajaykumar Dharmireddy, Dr Sreenivasa Rao Ijjada,I.Hemalatha “Performance analysis of various Fin patterns of hybrid Tunnel FET” International Journal of Electrical and Electronics Research (IJEER) , , issue no.4, pp. 806–810, 2022. DOI: 10.37391/.
    Dharmireddy, Ajaykumar, and Sreenivasarao Ijjada. "High Switching Speed and Low Power Applications of Hetro Junction Double Gate (HJDG) TFET" International Journal of Electrical and Electronics Research(IJEER) , , issue no.2 , 2023, pp. 596-600.
    Ajaykumar Dharmireddy., Srinivasulu, P., Greeshma, M., Babu, V. S., Kumar, M. R., & Rajasekaran, A. S. “Driver Drowsiness Detection Using AIoT and Machine Learning Techniques” Artificial Intelligence of Things, Auerbach publisher,,, 2025..ISBN: 9781032773018