Dr Padma Challa
Associate Professor and ECE · Dr C. PADMA
Biography
Padma Challa received her M.Tech degree in VLSI System Design from JNTUA Ananthapuramu in 2013, and Ph.D in the area of VLSI and Signal Processing from Jawaharlal Nehru Technological University Ananthapuramu (JNTUA) in 2023, and is now currently working as Associate Professor in ECE department at Sri Venkateswara College of Engineering, Tirupati. Her area of interests includes Low Power VLSI Architecures, Signal Processing and IOT. She can be contacted at email: padmasekhar85@gmail.com
Education
Ph.D JNTUA, Ananthapuramu 2023 M.Tech (VLSI System Design) JNTUA, Ananthapuramu 2013 80% AMIE (ECE) Institutution Of Engineers (India), Kolkatta. SVU College of Engineering, Tirupathi. 2009 65.20% Diploma (DECE) S.B.T.E & T, Hyderabad GOVT., S.P.W., Polytechnic, Tirupati. 2003 74.83% SSC Board of Secondary Education, A.P Z.P.H.School, K.K.V.Puram, Chittoor (D), A.P. 2000 74.50%
Recent Scopus Publications
- Design of a 64-bit SQRT-CSLA with Reduced Area and High-Speed Applications in Low Power VLSI Circuits
- An Efficient 32-Bit Carry Look Ahead Adder using PFAL for Low Power Circuits
- Implementation of I2C Protocol with Adaptive Baud Rate for N Number of Bits Using VERILOG
- DESIGN AND ANALYSIS OF PARTITION TECHNIQUE BASED DADDAMULTIPLIER ARCHITECTURE
- PERFORMANCE OPTIMIZED GROUP DECOMPOSITION DADDA MULTIPLIER FOR DSP APPLICATIONS
Links
- ORCID https://orcid.org/0000-0002-8880-1624
- Google Scholar https://scholar.google.com/citations?user=NExniQMAAAAJ
- Scopus https://www.scopus.com/authid/detail.uri?authorId=57215831376