Pardhu Thottempudi
Assistant Professor, Department of Electronics and Communications Engineering · BVRIT HYDERABAD College Of Engineering For Women
Research Interests
1. Assistant Professor- SR University- 24th Aug2022- 28th feb 2023 2. Assistant Professor-MLRIT- 1st Dec 2016- 22nd Aug 2022 3. Assistant Professor- St.Peters Engg College- 13th Nov 2015-30th Nov 2016 4. Assistant Professor- MLRITM- 10th July 2013- 12th Nov 20...
Biography
Pardhu Thottempudi became a member (M) of IEEE in 2015. Pardhu was born in Luxettipet village in Adilabad district in Telangana state, India. He completed Batchelor’s degree B.tech in the stream of electronics and communication engineering in 2011 from MLR Institute of Technology, Hyderabad, India. He has done his master’s degree M.Tech in embedded systems from Vignan’s University, Vadlamudi in 2013. He is pursuing Ph.D in the stream of RADAR signal processing from VIT University His Research Includes Human Motion Analysis Behind walls using Optimized Deep Learning Algorithms. His major fields of interests include Digital Signal Processing, RADAR communications, embedded systems, and implementation of signal processing on applications in FPGA. He is working as assistant professor of department of Electronics and Communication Engineering in BVRIT HYDERABAD College of Engineering for Women, Hyderabad, India since 2023.
Education
Ph.D- VIT University, VELLORE- Thesis Submitted (2023) M.Tech- Vignan University, Vadlamudi- 2013 B.Tech- MLRIT, Hyderabad- 2011 Intermediate-2011 Tenth-2005
Recent Scopus Publications
- Smart Agriculture: Crop Prediction, Fertilizer Recommendation and Water Requirement using Machine Learning
- Impact of ChatGPT on the Indian Educational System: An Academic Study
- Enhanced Fingerprint Recognition System Using Minutiae-Based Analysis and FFT-Based Feature Extraction
- Design and Simulation on Chip Fractal Inductor for Sub–THz Applications
- Dynamic multi-modal attention network for robust and real-time through-wall human activity recognition
Research Outputs
1.Power Efficient Compressor Using Full Adder Circuit Inventor: Thottempudi Pardhu Status: Published on 29/08/2014 pp:60 Application Number:3975/CHE/2014 2.
Links
- ORCID https://orcid.org/0000-0002-9653-1951
- Google Scholar https://scholar.google.com/citations?user=EaemGwIAAAAJ
- Scopus https://www.scopus.com/authid/detail.uri?authorId=56352510500