K V G SRINIVAS
Assistant Professor · ANIL NEERUKONDA INSTITUTE OF TECHNOLOGY AND SCIENCES
https://researchid.co/srinu43306
@anits.edu.in
21Scopus Publications
88Google Scholar Citations
6Google Scholar h-index
2Google Scholar i10-index
Research Interests
VLSI, SIGNAL PROCESSING
Recent Scopus Publications
- Performance Optimized 32-bit Multiplier: Integrating Vedic and Karatsuba Techniques
- Optimizing Power Consumption: CSD-Based 16-Bit Multiplier for Low-Power Systems
- Design And Implementation Of Power Efficient Multiplier Using Reversible Logic
- FPGA Implementation of a Resource Efficient Vedic Multiplier using SPST Adders
- Design and Implementation of Hybrid Full Adder Based 16-bit Multiplication Using FPGA
Links
- ORCID https://orcid.org/0000-0001-7870-3329
- Google Scholar https://scholar.google.com/citations?user=pQZBoLEAAAAJ
- Scopus https://www.scopus.com/authid/detail.uri?authorId=57195535325