Dr. Subodh kumar Singhal
Assistant Professor (SG), ECE · Jaypee University of Engineering and Technology, Guna
Research Interests
VLSI Architecture Design, Signal processing, Arithmetic Circuit Design, Image processing
Biography
Received B.E. in Electronics and Communication engineering in 2004 from R.G.P.V, Bhopal, Received M.Tech in VLSI Design from ABV-IIITM, Gwalior in 2006 and Received Ph.D degree in the area of VLSI implementation of DSP Algorithms from JUET, Guna in 2017. In 2006 he was selected for SMDP project, sponsored by MHRD Government of India and joined as Research engineer in the Department of Electronics and Communication engineering, MANIT, Bhopal. In 2007 he joined Jaypee University of Engineering and Technology, Guna, Madhya Pradesh as a Assistance Professor. Currently he serves as the reviewers of various IEEE Transactions, Journal of Circuit, System and Signal Processing, Springer. He has member of various professional bodies like IEEE, IETE. His research interest includes various VLSI architectures design, ASIC and FPGA designs, Image processing. He has published nearly 6 technical papers.
Education
B.E., M.Tech., Ph.D.
Recent Scopus Publications
- An efficient method of modulo adder design for Digital Signal Processing applications
- A Phase Modulation-Based Approach for Theft-Proof Electricity Distribution in India Using CDMA Technology
- An area-delay efficient single-precision floating-point multiplier for VLSI systems
- Performance analysis of single image fog expulsion techniques
- Area-delay efficient Radix-4 8×8 Booth multiplier for DSP applications
Links
- ORCID https://orcid.org/0000-0002-1136-1421
- Google Scholar https://scholar.google.com/citations?user=KvhvshsAAAAJ
- Scopus https://www.scopus.com/authid/detail.uri?authorId=35109815500