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Dr Parameshwara M C

Associate Professor · Department of Electronics and Communication, M S Ramaiah Institute of Technology

https://researchid.co/pmc0512_77
@msrit.edu
25Scopus Publications
271Google Scholar Citations
9Google Scholar h-index
8Google Scholar i10-index

Research Interests

VLSI, Quantum Computing, Image Processing

Biography

Dr. Parameshwara M C obtained his B.E. degree from Bangalore University in Electronics and Communication Engineering in 1999, M.Tech in Electronics Engineering from BMSCE, Bangalore, Visvesvaraya Technological University (VTU) in 2007, and obtained the Ph.D. in Electrical & Electronic Engineering Sciences from VTU, Belagavi in 2018. He joined the Department of Electronics & Communication Engineering, Vemana Institute of Technology, in 2004 as a Lecturer,. Currently, he is an Associate Professor and Head of the Department . He has over 20 years of Teaching experience in Analog Electronics, VLSI, Advanced Mixed Signal design, Linear Integrated Circuits, Microelectronics, CMOS VLSI Design, Verilog HDL, and VHDL. His Area of Specialization is VLSI, Quantum Computing, and Mixed mode VLSI Design. He has published 35 research papers in National and International conferences and Journals. He is a senior member of IEEE and life member of ISTE.

Education

BE(ECE), M.Tech(Electronics), Ph.D(VLSI Circuits & Systems)

Recent Scopus Publications

  1. Design of an Area-Efficient and Low-Power 4:2 Approximate Compressor with Improved Image Quality Metrics
    IEEE Embedded Systems Letters, 2026
  2. Approximate Adders with Configurable Input Wiring: A Quantum-dot Cellular Automata Nanocomputing Perspective
    Journal of Circuits Systems and Computers, 2026
  3. Reversible quantum circuits for approximate computing with image processing application
    Signal Image and Video Processing, 2025
  4. A New Exact Reversible Full Adder for High Speed Arithmetic Applications
    2024 3rd International Conference for Innovation in Technology Inocon 2024, 2024
  5. Reconfigurable lower-part approximate adder with errortolerant application: an approach using QCA computing
    International Journal of Ad Hoc and Ubiquitous Computing, 2024

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