Babita Jajodia

@assistant professor

Assistant Professor, Department of Electronics and Communication Engineering
Indian Institute of Information Technology, Guwahati

Babita Jajodia


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https://researchid.co/babitajajodia
I, Dr. Babita Jajodia, am an Assistant Professor in the Department of Electronics and Communications Engineering (ECE) at the Indian Institute of Information Technology Guwahati (IIITG) working from July 2019. Prior to that, I received the Ph.D. degree in VLSI Design from the Indian Institute of Technology Guwahati (IITG). Following that I worked at the Gauhati University Institute of Science and Technology (GUIST) as a guest faculty. My research interests are on VLSI Design for Digital/Analog/Mixed-Signal Systems and Quantum Computing.

EDUCATION

Mixed-Signal VLSI Design (PhD) from Indian Institute of Technology Guwahati

RESEARCH, TEACHING, or OTHER INTERESTS

Electrical and Electronic Engineering, Hardware and Architecture
43

Scopus Publications

222

Scholar Citations

9

Scholar h-index

8

Scholar i10-index

Scopus Publications

RECENT SCHOLAR PUBLICATIONS

  • FPGA Architectures for 32-Point Radix-2 DIT and DIF FFT Using IEEE 754 Half-Precision Floating-Point Arithmetic
    K Shruthi, R Tiwari, B Kanval, B Jajodia
    2026 IEEE Madhya Pradesh Section Conference (MPCON), 744-750 , 2026
    2026
  • Optimized Schoolbook-Based Sub-Multiplication Architecture for Polynomial Multiplication in Large Integer Arithmetic on FPGAs
    M Das, R Maharana, R Tiwari, K Shruthi, V Chaturvedi, GD Gautam, ...
    2026 IEEE Madhya Pradesh Section Conference (MPCON), 760-765 , 2026
    2026
  • Digital Implementation of Cordic-Based Fitzhugh Nagumo Neuron Models on FPGAs
    TD Roy, V Chaturvedi, B Jajodia
    2026 IEEE Madhya Pradesh Section Conference (MPCON), 738-743 , 2026
    2026
  • Hardware Design of Optimized Schoolbook-Based Finite Field Multiplications on FPGAs
    SK Singh, R Maharana, A Roy, K Shruthi, R Tiwari, V Chaturvedi, M Das, ...
    2026 IEEE Madhya Pradesh Section Conference (MPCON), 751-759 , 2026
    2026
  • Interpretable machine learning for diabetes risk prediction: a large-scale analysis of Indian national survey data
    B Barman, HK Choudhury, B Jajodia
    Discover Public Health 22 (1), 832 , 2025
    2025
    Citations: 1
  • Hybrid FSR-Based Pseudo-Random Number Generator on FPGA for Encrypting Biometrics
    K Menon, G Mali, B Jajodia
    2025 37th International Conference on Microelectronics (ICM), 1-5 , 2025
    2025
  • Improved Montgomery Modular Multipliers on FPGAs and ASICs
    A Roy, R Maharana, SK Singh, B Jajodia
    IEEE Embedded Systems Letters , 2025
    2025
  • Division-Free Four-Way Toom-Cook Polynomial Multiplication Architecture for Large Integer Arithmetic on FPGAs and ASICs
    M Das, B Jajodia
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2025
    2025
    Citations: 1
  • Hybrid quantum-classical solution for automated labeling and validation
    J Lalwani, D Linnet, M Vetrivelan, KH Venkat, R Shaik, B Jajodia
    Quantum Information Science, Sensing, and Computation XVII 13451, 51-65 , 2025
    2025
  • ATP-Optimized Implementation of Four-Way Toom-Cook Multiplications on FPGAs for Large Integer Arithmetic
    M Das, B Jajodia
    Circuits, Systems, and Signal Processing 44 (5), 3554-3569 , 2025
    2025
    Citations: 3
  • Floating Point Multipliers on FPGAs
    U Singh, R Mundliya, R Maharana, B Jajodia
    2025 Devices for Integrated Circuit (DevIC), 702-707 , 2025
    2025
    Citations: 1
  • Hybrid recursive Karatsuba multiplications on FPGAs
    M Das, B Jajodia
    IEEE Embedded Systems Letters 17 (4), 240-243 , 2025
    2025
    Citations: 9
  • FPGA-Based SoC Design with CORDIC-POSIT Arithmetic for Efficient IoT Data Processing
    S Singh, B Jajodia
    2024 International Conference on IoT, Communication and Automation … , 2024
    2024
  • Approximate Modular Multipliers for R-LWE Cryptosystems on FPGAs and ASICs
    S Maurya, B Jajodia
    2024 IEEE Silchar Subsection Conference (SILCON 2024), 1-6 , 2024
    2024
  • Area and delay trade-offs in three-way Toom-Cook large integer multipliers implemented on FPGAs
    M Das, B Jajodia
    IEEE Transactions on Circuits and Systems I: Regular Papers 72 (2), 600-609 , 2024
    2024
    Citations: 8
  • ATP-Optimized Four-Term Karatsuba Multipliers for Large Integer Arithmetic on FPGAs
    S Patel, S Singh, S Kumar, M Das, B Jajodia
    2024 First International Conference on Electronics, Communication and Signal … , 2024
    2024
    Citations: 1
  • FPGA-Optimized Seven-Term Karatsuba Multipliers for Large Integer Arithmetic
    R Maharana, A Roy, SK Singh, M Das, B Jajodia
    2024 First International Conference on Electronics, Communication and Signal … , 2024
    2024
    Citations: 2
  • FPGA-Optimized Asymmetrical and Symmetrical Six-Term Karatsuba Multipliers
    R Maharana, SK Singh, A Roy, M Das, B Jajodia
    2024 First International Conference on Electronics, Communication and Signal … , 2024
    2024
    Citations: 1
  • An Eight-Term Karatsuba Multiplier for Cryptographic Hardware Primitives on FPGAs
    S Singh, S Patel, S Kumar, M Das, B Jajodia
    2024 3rd International Conference on Advancement in Electrical and … , 2024
    2024
  • Efficient Earth Observation Satellites Mission Planning with Quantum Algorithm
    J Lalwani, D Linnet, B Jajodia, MB Pande, A Patel, K Dave, BR Nikilesh
    2024 International Conference on Trends in Quantum Computing and Emerging … , 2024
    2024
    Citations: 1

MOST CITED SCHOLAR PUBLICATIONS

  • Design automation of two-stage operational amplifier using multi-objective genetic algorithm and SPICE framework
    P Das, B Jajodia
    2022 International Conference on Inventive Computation Technologies (ICICT … , 2022
    2022
    Citations: 23
  • Hardware design of optimized large integer schoolbook polynomial multiplications on FPGA
    M Das, B Jajodia
    2022 19th International SoC Design Conference (ISOCC), 65-66 , 2022
    2022
    Citations: 20
  • Towards an optimal hybrid algorithm for ev charging stations placement using quantum annealing and genetic algorithms
    A Chandra, J Lalwani, B Jajodia
    2022 International Conference on Trends in Quantum Computing and Emerging … , 2022
    2022
    Citations: 18
  • Energy-efficient DAC switching technique for single-ended SAR ADCs
    B Jajodia, A Mahanta, SR Ahamed
    AEU-International Journal of Electronics and Communications 124, 153334 , 2020
    2020
    Citations: 18
  • Experimental analysis of attacks on rsa & rabin cryptosystems using quantum shor’s algorithm
    R Thombre, B Jajodia
    Proceedings of International Conference on Women Researchers in Electronics … , 2021
    2021
    Citations: 14
  • ART-MAC: Approximate rounding and truncation based MAC unit for fault-tolerant applications
    V Mishra, D Pandey, S Singh, S Satapathy, K Goswami, B Jajodia, ...
    2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1640-1644 , 2022
    2022
    Citations: 11
  • Efcsa: An efficient carry speculative approximate adder with rectification
    S Singh, V Mishra, S Satapathy, D Pandey, K Goswami, DS Banerjee, ...
    2022 23rd International Symposium on Quality Electronic Design (ISQED), 1-7 , 2022
    2022
    Citations: 11
  • IEEE 802.15. 6 WBAN standard compliant IR-UWB time-hopping PPM transmitter using SRRC signaling pulse
    B Jajodia, A Mahanta, SR Ahamed
    AEU-International Journal of Electronics and Communications 117, 153119 , 2020
    2020
    Citations: 10
  • Hybrid recursive Karatsuba multiplications on FPGAs
    M Das, B Jajodia
    IEEE Embedded Systems Letters 17 (4), 240-243 , 2025
    2025
    Citations: 9
  • HPAM: An 8-bit high-performance approximate multiplier design for error resilient applications
    D Pandey, V Mishra, S Singh, S Satapathy, B Jajodia, DS Banerjee
    2022 23rd International Symposium on Quality Electronic Design (ISQED), 1-5 , 2022
    2022
    Citations: 9
  • Area and delay trade-offs in three-way Toom-Cook large integer multipliers implemented on FPGAs
    M Das, B Jajodia
    IEEE Transactions on Circuits and Systems I: Regular Papers 72 (2), 600-609 , 2024
    2024
    Citations: 8
  • FPGA implementation of hybrid Karatsuba multiplications for NIST post-quantum cryptographic hardware primitives
    M Das, B Jajodia
    2022 19th International SoC Design Conference (ISOCC), 81-82 , 2022
    2022
    Citations: 7
  • Quantum image teleportation protocol (QITP) and quantum audio teleportation protocol (QATP) by using quantum teleportation and huffman coding
    M Karthik, J Lalwani, B Jajodia
    2022 International Conference on Trends in Quantum Computing and Emerging … , 2022
    2022
    Citations: 6
  • Quantum Text Teleportation Protocol for Secure Text Transfer by using Quantum Teleportation and Huffman Coding
    M Karthik, J Lalwani, B Jajodia
    2022 International Conference on Trends in Quantum Computing and Emerging … , 2022
    2022
    Citations: 5
  • Efficient hardware implementation of cube architecture using Yavadunam Sutra on FPGA
    M Thakare, P Yash, D Chakraborty, B Jajodia
    2021 IEEE international midwest symposium on circuits and systems (MWSCAS … , 2021
    2021
    Citations: 5
  • Hardware implementation for determining perfect and non-perfect square roots using dwandwa yoga on fpga
    M Thakare, B Jajodia
    2022 international conference on electrical, computer and energy … , 2022
    2022
    Citations: 4
  • Experimental evaluation of adder circuits on IBM QX Hardware
    D Singh, S Jakhodia, B Jajodia
    Inventive Computation and Information Technologies: Proceedings of ICICIT … , 2022
    2022
    Citations: 4
  • Demodulation techniques for IEEE 802.15. 6 IR-UWB DBPSK WBAN transceivers
    B Jajodia, RA Shaik, A Mahanta
    2015 IEEE 3rd International Conference on Smart Instrumentation, Measurement … , 2015
    2015
    Citations: 4
  • PPM demodulation schemes for IEEE 802.15. 6 IR-UWB WBAN receivers
    B Jajodia, RA Shaik, A Mahanta
    2015 IEEE International Conference on Signal Processing, Informatics … , 2015
    2015
    Citations: 4
  • ATP-Optimized Implementation of Four-Way Toom-Cook Multiplications on FPGAs for Large Integer Arithmetic
    M Das, B Jajodia
    Circuits, Systems, and Signal Processing 44 (5), 3554-3569 , 2025
    2025
    Citations: 3