Binduswetha Pasuluri

Scopus Publications

Design of High-Performance GDI Logic based 8-Tap FIR Filter at 45nm CMOS Technology using Nikhilam Multiplier

Reducing Computational Complexity in Digital Circuit Designing using Ancient Mathematics: A Review
Bindu Swetha Pasuluri and VJK Kishor Sonti
IEEE
In this computer era, it is very important to optimize and improve the efficiency of VLSI design circuits for area, speed and power dissipation. To increase speed and decrease power consumption, technologies must be improved, while new algorithms must be investigated. Vedic mathematical sutras have always had the ability to effectively design and execute multiplications as well as divisions in order to enhance VLSI design circuits. As a result, it is critical to develop new designs for vedic multipliers which are more efficient in terms of area, power, & speed. In this work, several implementations of Vedic mathematics in digital circuits have been explored in terms of architectural implementation while considerations such as area, power, and speed are analysed.

Design and Performance Analysis of Analog Filter and Digital Filter with Vedic Multipliers in Bio-Medical Applications
Bindu Swetha Pasuluri and V.J.K. Kishor Sonti
IEEE
In this article, we propose a first order analogue LPF based on a simple current mirror Operational Transconductance Amplifier (OTA), as well as a digitized LPF with Vedic multipliers for bio-medical applications. The analogue filter is intended for use in ECG signal acquisition, and then it works in the weak inversion area with extremely low power consumption. The current mirror-based OTA employed here streamlines the entire design of the OTA as well as lowers the number of available components required to implement the filter. The filter was created and modelled on 45nm CMOS technology. Additionally, this article represents a major advancement in the implementation of a FIR filter based on the updated Nikhilam Sutra Multiplier. Additionally, the Kongestone adder would also have been employed to increase speed and performance. To achieve the optimum results, the redesigned FIR filter architecture was modelled and generated employing Xilinx FPGA Spartan 6 as well as Xilinx ISE. The analogue filter does have a bandwidth of 100 Hz as well as a power usage of 0.276 μ,W, according to computational findings. The simulation findings indicate that the proposed Digitized FIR filter architecture works at least 20% quicker than conventional multiplier-based LPFs. If compared to previous designs, both of the digital and analogue filters presented here improved in terms of their performances.

Design of Vedic multiplierbased FIR filter for signal processing applications
Bindu Swetha Pasuluri and V.J.K. Kishor Sonti
IOP Publishing
Digital Signal Processing (DSP) devices are becoming increasingly important with the introduction of multiple signal processing techniques. Vedic Multiplier is one of the most common applications for high-speed DSP deployment. This paper constitutes a significant development in the design of the FIR filter architecture based on the modified Nikhalam Sutra Vedic multiplier. In addition, the Kongestone adder is used to increase speed performance. Using Xilinx FPGA Spartan 6 with Xilinx ISE, the modified architecture of FIR filter has been simulated and synthesized for achieving optimized results. The simulation results of the proposed FIR filter architecture illustrate that it operates at least 20 percent faster than traditional multiplier-based FIR filters

UART Implementation using the BIST Technique for Generating Test Patterns
BinduSwetha Pasuluri, D. Raja Sekhar, K. Udaya Kiran, J. Manga, and Bala Dastagiri N
IEEE
The rapid development of technology had reflected in the shrinking and complexity of VLSI circuits. Designers of such complex circuits must prioritize testability to guarantee the circuits' longevity and functionality. Sub-micron technological development increased the difficulty of testing VLSI circuits, requiring the hunt for alternatives to traditional testing. BIST is helpful because it allows the Test Pattern Generator (TPG) as well as Response Analyzer to assess modules without separating them from underlying circuits. The Universal Asynchronous Receiver Transmitter (UART) is used mainly for short-distance communication between CPUs and peripherals. Our aim is to develop a BIST-compliant UART. We designed an eight-bit UART module that may be utilized in two modes: testing and normal operation. The experiments were carried out with the help of a Linear Feedback Shift Register (LFSR) as well as a Multiple Input Signature Register (MISR). This article describes how to create a UART with BIST capabilities in Verilog HDL, which is subsequently simulated in Xilinx Vivado.

Post COVID-19 potentials and innovation: The future supply chain
Bindu Swetha Pasuluri, Anuradha S G, Manga J, and Deepak Karanam
GP Innovations Pvt. Ltd.
An unanticipated outburst of pneumonia of inexperienced in Wuhan, , China stated in December 2019. World health organization has recognized pathogen and termed it COVID-19. COVID-19 turned out to be a severe urgency in the entire world. The influence of this viral syndrome is now an intensifying concern. Covid-19 has changed our mutual calculus of ambiguity. It is more world-wide in possibility, more deeply , and much more difficult than any catastrophe that countries and organizations have ever faced. The next normal requires challenging ambiguity head-on and building it into decision-making. It is examined that every entity involved in running supply chains would require through major as employee, product, facility protocols, and transport would have to be in place. It is an urgent need of structuring to apply the lessons well-read for our supply chain setup. With higher managers now being aware of the intrinsic hazards in their supply chain, key and suggestions-recommendations will help to guide leader to commit to a newly planned, more consistent supply chain setup. Besides, the employees’ mental health is also a great concern.

Analysis of dielectric and temperature impact on co-axial CNTFET characteristics using NEGF
Argha Sarkar, Bindu Swetha Pasuluri, C. Aswini, and Mayuri Kundu
Elsevier BV

Performance Analysis of 8-Bit Vedic Multipliers Using HDL Programming
Bindu Swetha Pasuluri and V. J. K. Kishor Sonti
Springer Singapore

CMOS Implementation of Comparators for ADCs
Pasuluri Bindu Swetha, S. Fowzia Sultana, K. C. T. Swamy, and Nadhindla Bala Dastagiri
Springer Singapore

Dehazing using fast guided image filtering
Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
Single image edge-saving smoothing methods such as guided picture shifting (GIF) and weighted guided picture shifting (WGIF) couldn't save fine structure. In this paper, another all inclusive guided picture shifting GIF is presented to defeat the issue. The Guided image filtering is made out of a worldwide structure exchange channel and a worldwide edgesaving smoothing channel. The proposed channel is connected to ponder single picture fog evaluation. Trial results demonstrate that fine structure of the dehazed picture is in reality protected better by the proposed Guided image filter what's more, the dehazed pictures by the proposed Guided filter are more than those dehazed pictures by the current Guided image filtering. from a nearby direct model, the guided channel figures the shifting yield by considering substance of direction picture. Guided channel be utilized as an edge-saving smoothing administrator like famous respective channel, however it has better practices close edges. In addition, channel normally quick and non approximate direct calculation, paying little mind to the bit size and the force go. Right now, it is one of the quickest edgesaving channels

Brain tumour segmentation based on SFCM using back propagation neural network
A. Senthilkumar, V. Gokilavani, M. Lavanya and S. Lavanya
Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
Magnetic Resonance image (MRI) is predominant in clinical application. MRI used in diagnostic and therapeutic applications and it is pain free treatment. Blur boundaries in high resolution medical resonance image, the tumour segmentation and classification is very hard. In identification method brain tumour is used to upgrade the accuracy and reduce the analysis time. The tumour tissues classified into four they are normal, begin, premalignant and malignant. In MR images, the amount of data is high to explain and analysis. In current years, segmentation of tumour in magnetic resonance image has essential in research field of clinical imaging. Exact shape, size and location of tumour can diagnose. The diagnostic method contain four stages, pre-processing, feature extraction, classification and segmentation.

Analysis of multi-frequency multi-GNSS real-time signal observations acquired by septentrio PolaRx5 receiver station

Binduswetha Pasuluri

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