Dr. R. Latha (Rajagopalan Latha) obtained her Bachelor’s degree in Electronics and Communication Engineering and Master’s degree in Applied Electronics from Bharathiar University , TamilNadu, India, She pursued her Doctorate in the area of Multi rate DSP and Low Power VLSI Design from Anna University-Chennai, TamilNadu, India. She has rich academic & research experience of about 24.9 years. Her specializations include Microelectronics, Microcontroller Architecture Design, Digital Signal Processing and VLSI Design. Her current research interests are in the area of Multi-rate Digital filter design, Wireless Communication and Architecture Optimization using HDL’s. She is a Member of IEEE, IETE, ISTE, IAENG, SEEE, NFED and SSI. She has completed four AICTE sponsored/research projects as a Principal Investigator. She has about 107 technical and research publications and presentations to her credit in International Journals and Conferences.
EDUCATION
B.E -Electronics & Communication Engineering
M.E- Applied Electronics
Anna University
RESEARCH INTERESTS
Low Power VLSI and Multirate DSP
8
Scopus Publications
173
Scholar Citations
7
Scholar h-index
6
Scholar i10-index
Scopus Publications
Hybrid Threshold Speech Enhancement Scheme Using TEO and Wavelet Coefficients Latha R, Suhas A R, B P Pradeep Kumar, M.Mohammed Ibrahim, Sathiyapriya V 2023 2nd International Conference on Electrical Electronics Information and Communication Technologies Iceeict 2023, 2023 Speech Enhancement (SE) aims to improve the quality of degraded speech while maintaining its intelligibility. The Wavelet Transform (WT) has become a powerful tool of signal analysis thereby widely used in signal detection and signal denoising. In this paper, we propose an effective means of SE by a hybrid threshold scheme using WT. The proposed methodology looks into both falling the noise and preserving edges of the speech signal unlike the conventional Hybrid Threshold (HT) and Soft Threshold (ST) in the wavelet domain. The threshold value in the wavelet domain is maintained constant for all sub-bands of the signal which reduces denoising efficiency. A novel speech augmentation technique built on the wavelet onsets and time adaption of introduced by calculating wavelet coefficients of the Teager Energy. Performance analysis of speech enhancement techniques using Wavelet coefficients and Teager Energy Operator (TEO) with hybrid threshold method is done. The experiment is carried out for speech data with various values of SNR vacillating from -10 to +10 db with Additive White Gaussian Noise (AWGN).
FPGA Implementation of Polyphase CIC Based Multistage Filter for Digital Receivers R. Latha, C. Venkatesan, A.R. Suhas, T. Thamaraimanalan 8th International Conference on Advanced Computing and Communication Systems Icaccs 2022, 2022 The main focus of this work is to propose suitable architectures for the decimation filter networks of digital receivers that use the reduced logic and are capable of receiving multiple communication standard signals. It also involves the design, simulation, and implementation of multi-stage multi-rate filter architectures with reduced Very Large Scale Integrated (VLSI) cost functions. In the first multi-stage architecture namely, the Multi-Standard Decimation Filter (MSDF) structure is proposed to cater to the need of reception of multi-standard receiver signals. The MSDF architecture is designed for GSM and WiMAX wireless communication specifications and its first stages are designed using Cascaded Integrator Comb (CIC) filters. In the second architecture, a modified MSDF structure is implemented using polynomial CIC filters to meet the multi-standard requirements. The third architecture concentrates on design parameters of polyphase CIC-based decimation filter and its implementation concepts. Spartan FPGA-based implementation results that the proposed polynomial CIC-based MSDF architecture provides 32.11% of area reduction when related with the multistage MSDF. The proposed polyphase CIC-based MSDF architecture provides 28.57% of dynamic power-saving and a 15.5% increase in speed when compared to polynomial-based MSDFC architecture. Thus, the proposed polyphase MSDF architecture provides low power and lesser delay solutions using a multistage decimation approach and it is best suited for multi-standard communication applications in digital receivers.
Robust Node Localization with Intrusion Detection for Wireless Sensor Networks R. Punithavathi, R. Thanga Selvi, R. Latha, G. Kadiravan, V. Srikanth, Neeraj Kumar Shukla Intelligent Automation and Soft Computing, 2022 Wireless sensor networks comprise a set of autonomous sensor nodes, commonly used for data gathering and tracking applications. Node localization and intrusion detection are considered as the major design issue in WSN. Therefore, this paper presents a new multi-objective manta ray foraging optimization (MRFO) based node localization with intrusion detection (MOMRFO-NLID) technique for WSN. The goal of the MOMRFO-NLID technique is to optimally localize the unknown nodes and determine the existence of intrusions in the network. The MOMRFO-NLID technique encompasses two major stages namely MRFO based localization of nodes and optimal Siamese Neural Network (OSNN) based intrusion detection. The OSNN technique involves the hyperparameter tuning of the traditional SNN using the MRFO algorithm and consequently increases the detection rate. In order to assess the enhanced performance of the MOMRFO-NLID technique, a series of simulations take place and the results reported superior performance compared to existing techniques interms of distinct evaluation parameters.
Texture classification using optimized local ternary patterns with nonlinear diffusion as pre-processing G. Madasamy Raja, Mohamed Thaha, R. Latha, A. Karthikeyan Multimedia Tools and Applications, 2020 The main focus of this paper is to improve the performance of the texture model Optimized Local Ternary Patterns (OLTP), which is known as one of the successful variants of the texture model Local Binary Patterns (LBP), a well known method for texture analysis and its applications. Generally preprocessing is used in digital image processing for reducing the unwanted noise and disturbances in such a way that it improves the quality of the image. Preprocessing not only removes the distortions but also enhances the features of the image for further processing. To achieve better recognition accuracy, the texture model OLTP was combined with a preprocessing method that uses nonlinear diffusion method as a preprocessing tool in this paper, with the hope that this idea will surely improve the local feature description and texture classification process. This nonlinear diffusion method uses two newly developed edge stopping functions for preprocessing. This proposed method is tested with two standard texture datasets namely Brodatz Dataset and Usptex dataset. The results show that the use of the preprocessing step really improved the texture classification accuracy.
Power and Area Efficient Decimation Filter Architectures of Wireless Receivers Latha Rajagopal Proceedings of the National Academy of Sciences India Section A Physical Sciences, 2017 This paper reports on the synthesis and implementation of a digital decimation filter suitable for multi-standard transceivers. Decimation filter architectures used in transceivers must be capable of providing low power and less area. In this paper, three different architecture designs namely Decimation Filter with Conventional MAC Unit, Cascaded Multi-Standard decimation Chain and Hybrid structure are proposed to meet the demand of low power and area efficient digital decimation filter. The filter architectures are implemented using FPGA and its performances are tested. The architectures are tested using conventional number system and with two different encoding schemes of filter coefficients called canonic signed digit and minimum signed digit. The implementation results reflect that considerable reduction in area of 47.9 % and power reduction of 28.6 % are achieved using hybrid architecture, when compared with conventional MAC and cascaded chain architectures.
Design of digital filters for multi-standard transceivers R Latha, , P T Vanathi, and International Journal on Electrical Engineering and Informatics, 2015 This paper addresses on three different architectures of digital decimation filter design of a multi-standard RF transceivers. Instead of using single stage decimation filter network, the filters are implemented in multiple stages using FPGA to optimize the area, delay and dynamic power consumption. The proposed decimation filter architectures reflect the considerable reduction in area and dynamic power consumption without degradation of performance. The filter coefficients are derived from MATLAB, the filter architectures are implemented and tested using Xilinx SPARTAN FPGA .First, the types of decimation filter architectures are tested and implemented using conventional binary number system. Then the two different encoding schemesi.e. Canonic Signed Digit (CSD) and Minimum Signed Digit (MSD) are used for filter coefficients and then the architecture performances are tested .The results of CSD and MSD based architectures show a considerable reduction in the area and power against the conventional number system based filter design implementation. The implementation results reflect that considerable reduction in area of 47.89% and dynamic power reduction of 28.64% are achieved using hybrid architecture.
Hybrid architecture of digital filter for multi-standard transceivers International Journal of Applied Engineering Research, 2014
Optimized digital filter architectures for multi-standard RF transceivers Journal of Theoretical and Applied Information Technology, 2014
RECENT SCHOLAR PUBLICATIONS
Design and Analysis of a Low-Power Reconfigurable ALU for Edge Computing Applications K Devendiran, R Latha 2026 International Conference on Intelligent and Innovative Technologies in … , 2026 2026
Battery Management Systems in EVs: A Holistic Review K Divya, R Latha, A Aswini, J Priyadharshini 2025 4th International Conference on Automation, Computing and Renewable … , 2025 2025
Integrating Robust Encryption Schemes into Elliptic Curve Cryptography for Mobile Edge Security BN Bavana, S Prasad, R Latha 2024 5th IEEE Global Conference for Advancement in Technology (GCAT), 1-6 , 2024 2024
Survey on the Pivotal Role of Artificial Intelligence and Machine Learning in Shaping the Future of 6th Generation (6G) Communications S Prasad, R Latha, S Arun International Conference on Data Science and Applications, 79-91 , 2024 2024 Citations: 1
Hybrid threshold speech enhancement scheme using TEO and wavelet coefficients R Latha, AR Suhas, PK BP, V Sathiyapriya 2023 Second international conference on electrical, electronics, information … , 2023 2023 Citations: 11
FPGA implementation of polyphase CIC based multistage filter for digital receivers R Latha, C Venkatesan, AR Suhas, T Thamaraimanalan 2022 8th International Conference on Advanced Computing and Communication … , 2022 2022 Citations: 36
Robust Node Localization with Intrusion Detection for Wireless Sensor Networks NKS R. Punithavathi, R. Thanga Selvi, R. Latha, G. Kadiravan, V. Srikanth Intelligent Automation & Soft Computing 33 (1), 143-156 , 2022 2022 Citations: 40
VLSI implementation of DENLMS adaptive filter for biomedical applications C Venkatesan, T Thamaraimanalan, R Latha Middle East Journal of Applied Science & Technology 5 (1), 119-127 , 2022 2022 Citations: 1
Parameter optimisation of FACTS using cuckoo search algorithm for ATC enhancement in restructured power systems K Bavithra, S Charles Raja, K Anadhakumar, R Latha Int Energy J 18 (2A), 247-254 , 2020 2020 Citations: 4
Implementation of Dual Stage Multi-rate Filter MS Latha R International Journal of Recent Technology and Engineering 8 (6), 489-494 , 2020 2020
Texture classification using optimized local ternary patterns with nonlinear diffusion as pre-processing G Madasamy Raja, M Thaha, R Latha, A Karthikeyan Multimedia Tools and Applications 79 (5), 3831-3846 , 2020 2020 Citations: 10
Design of Power Factor Correction Controller using Buck-Boost Converter in Wireless Charging System for Electric Vehicle C Rajalakshmi, R Latha 2020 Citations: 2
Secure Communication using Hybrid Cryptosystem AP Dr. R. Latha, R. Vinothini, S. Vinothinis, M. Aarthi International Research Journal in Global Engineering and Sciences 4 (1), 51-55 , 2019 2019
Dynamic resource Allocation in Mobile Cloud Computing Security SV M. Chitra, Dr. R. Latha, R. Aravindvignesh International Journal on Recent Researches in Science, Engineering … , 2019 2019
Secure Communication using Hybrid Cryptosystem MA Dr.R.Latha , Mrs.R.Vinothini, Ms.S.Vinothinis , Ms.M.Aarthi International Journal of Computer Science and Engineering 6, 77-79 , 2019 2019
Improved Data De-Duplication in Cloud SD Amutha K, Latha R, S.Akshaya International Journal of Computer Science and Engineering ( S 5, 71-76 , 2019 2019
AN INTELLIGENCE PREGNANT LADY SAFETY SECURITY SYSTEM R Latha, T Sangeetha, SS Anuchandra, KR Yazhini, J Jayabarathi 2019 Citations: 1
An Efficient Trust Analysis Technique in MANET’S DRL M.Chitra, V.Ganesh Aravinth, G.Chidhartahan International Journal on Recent Researches in Science, Engineering … , 2019 2019
Efficient VLSI Architecture for 4G Crypto Processor using Milenage & ZUC Algorithm PS Dr. R.Latha ,Dr. C.Thiripura sundari, V.Agalya, D.Sandhiya Efficient VLSI Architecture for 4G CryptInternational Research Journal in … , 2019 2019
An Intelligence Pregnant Lady Safety Security System JJ Dr. R. Latha, T.Sangeetha, S.S.Anuchandra, K.R.Yazhini International Journal on Recent Researches in Science, Engineering … , 2019 2019
MOST CITED SCHOLAR PUBLICATIONS
Robust Node Localization with Intrusion Detection for Wireless Sensor Networks NKS R. Punithavathi, R. Thanga Selvi, R. Latha, G. Kadiravan, V. Srikanth Intelligent Automation & Soft Computing 33 (1), 143-156 , 2022 2022 Citations: 40
FPGA implementation of polyphase CIC based multistage filter for digital receivers R Latha, C Venkatesan, AR Suhas, T Thamaraimanalan 2022 8th International Conference on Advanced Computing and Communication … , 2022 2022 Citations: 36
Effects of heat dissipation on the peristaltic flow of Jeffery and Newtonian fluid through an asymmetric channel with porous medium R Latha, BR Kumar, OD Makinde Defect and Diffusion Forum 387, 218-243 , 2018 2018 Citations: 29
Peristaltic flow of couple stress fluid in an asymmetric channel with partial slip R Latha, BR Kumar, OD Makinde Defect and Diffusion Forum 387, 385-402 , 2018 2018 Citations: 17
Hybrid threshold speech enhancement scheme using TEO and wavelet coefficients R Latha, AR Suhas, PK BP, V Sathiyapriya 2023 Second international conference on electrical, electronics, information … , 2023 2023 Citations: 11
Texture classification using optimized local ternary patterns with nonlinear diffusion as pre-processing G Madasamy Raja, M Thaha, R Latha, A Karthikeyan Multimedia Tools and Applications 79 (5), 3831-3846 , 2020 2020 Citations: 10
Power and area efficient decimation filter architectures of wireless receivers L Rajagopal Proceedings of the National Academy of Sciences, India Section A: Physical … , 2017 2017 Citations: 8
Parameter optimisation of FACTS using cuckoo search algorithm for ATC enhancement in restructured power systems K Bavithra, S Charles Raja, K Anadhakumar, R Latha Int Energy J 18 (2A), 247-254 , 2020 2020 Citations: 4
Design of Digital Filters for Multi-standard Transceivers. R Latha, PT Vanathi International Journal on Electrical Engineering & Informatics 7 (3) , 2015 2015 Citations: 4
Adaptive neuro-fuzzy inference system-particle swarm optimization based stability maintenance of power system networks R Latha, J Kanakaraj American Journal of Applied Sciences 10 (8), 779 , 2013 2013 Citations: 3
Design of Power Factor Correction Controller using Buck-Boost Converter in Wireless Charging System for Electric Vehicle C Rajalakshmi, R Latha 2020 Citations: 2
Efficient Implementation of Parallel Linear Phase FIR Filters using Poly-phase Decomposition JTT Latha R International Journal of Computer Applications 6, 1-5 , 2013 2013 Citations: 2
Power Efficient Poly-phase Comb Filter for Digital Receivers K Latha R Bonfring International Journal of “Research in Communication Engineering” 2 … , 2012 2012 Citations: 2
Survey on the Pivotal Role of Artificial Intelligence and Machine Learning in Shaping the Future of 6th Generation (6G) Communications S Prasad, R Latha, S Arun International Conference on Data Science and Applications, 79-91 , 2024 2024 Citations: 1
VLSI implementation of DENLMS adaptive filter for biomedical applications C Venkatesan, T Thamaraimanalan, R Latha Middle East Journal of Applied Science & Technology 5 (1), 119-127 , 2022 2022 Citations: 1
AN INTELLIGENCE PREGNANT LADY SAFETY SECURITY SYSTEM R Latha, T Sangeetha, SS Anuchandra, KR Yazhini, J Jayabarathi 2019 Citations: 1
An Efficient 2-Bit Error Compensation with Side Channel Security R Latha, E Suruthi, K Divya, R Nithisha, R Sangeetha, B Subalakshmi International Research Journal in Global Engineering and Sciences 3 (4), 43-51 , 2019 2019 Citations: 1
OPTIMIZED DIGITAL FILTER ARCHITECTURES FOR MULTI-STANDARD RF TRANSCEIVERS. R Latha, PT Vanathi Journal of Theoretical & Applied Information Technology 65 (2) , 2014 2014 Citations: 1
Design and Analysis of a Low-Power Reconfigurable ALU for Edge Computing Applications K Devendiran, R Latha 2026 International Conference on Intelligent and Innovative Technologies in … , 2026 2026
Battery Management Systems in EVs: A Holistic Review K Divya, R Latha, A Aswini, J Priyadharshini 2025 4th International Conference on Automation, Computing and Renewable … , 2025 2025
Publications
1. Power and Area Efficient Decimation Filter Architectures of Wireless Receivers in Springer Journal “Proceedings of the National Academy of Sciences, India Section A: Physical Sciences”, Volume 87, Number 1, March 2017 ISSN: 0369-8203, PP: 83-96.
2. Texture classification using optimized local ternary patterns with nonlinear diffusion as pre-processing” in Springer Journal “Multimedia Tools and Applications” Volume 67, Issue 1, January 2019, ISSN: 1380-7501 (Print) 1573-7721 (Online),,PP: 3831-3846.
Posted as a trainer at M/s Robert Bosch Engineering and Business Solutions Ltd., Coimbatore for trainees & handled sessions on “Software Development Life Cycle in Embedded Systems” on 13.08.2011-30.09.2012.
