@mituniversity.ac.in
Assistant Professor , Computer Science and Engineering
MIT Arts, Design and Technology University
Embedded Systems, Microcontrollers and Microprocessor, Image Processing, C, C++, Object Oriented Programming
Scopus Publications
Scholar Citations
Scholar h-index
Scholar i10-index
Pravin Kshirsgar, Varsha More, Vaibhav Hendre, Pranav Chippalkatti, and Krishan Paliwal
Springer Singapore
Pravin Kshirsagar, Akshay Pote, K. K. Paliwal, Vaibhav Hendre, Pranav Chippalkatti, and Nikhil Dhabekar
Springer Singapore
Vrushali D. Ichake, Pranav Chipalkatti, and Ganesh Kadam
Springer International Publishing
Pranav Chippalkatti, Ganesh Kadam, and Vrushali Ichake
IEEE
TRAFFIC a direct or an indirect outcome of many minor issues has been creating havoc for an individual especially in urban areas. This paper proposes an architecture that introduces an efficient and eminent; rather a smart way to resolve the small module that actually counts i.e. Parking Area. We design a system so as to eliminate the time wastage and irrelevant frustration faced by the drivers based on IoT for real time monitoring of the empty slots for car parking from anywhere using a webpage or a mobile app; IoT the emerging research domain is the heart of the proposed system.
Asha Jadhav, Pravin N. Matte, and Pranav Chippalkatti
IEEE
FPGAs have become increasingly common in recent years due to their high performance compared to processors running software The ability to manage FPGA configuration memory state is essential for a wide variety of applications. Since the configuration memory is what dictates the functionality of the FPGA circuit, maintaining or modifying its state is often vital. An important domain that needs such an interface is maintaining FPGA reliability. FPGAs provide a number of mechanisms for configuration including the Joint Test Action Group (JTAG) standard, SelectMAP, the Internal Configuration Access Port (ICAP) and the Processor Configuration Access Port (PCAP). Since this paper contribute the study of such interfaces to configure several FPGAs with standard methods and compared.