@nits.ac.in
Student
NIT Silchar
Semiconductor Device Simulation and modelling
Scholar Citations
Scholar h-index
Scholar i10-index
[1] P. Ghosh, B. Bhowmick, “Low-frequency noise analysis of heterojunction SELBOX TFET,” Applied
Physics A. 124:838, 2018. .
[2] P. Ghosh, B. Bhowmick, “Noise behaviour of δp+ Si1-xGex layer SELBOX TFET,” Indian Journal of
Physics, pp. 1-8, 2019. .
[3] P. Ghosh, B. Bhowmick, “Optimisation of electrical parameters in Fe DSSBTFET and its application
as a digital inverter,” International Journal of Electronics, Taylor and Francis, pp. 1-15, 2019.
.
[4] P. Ghosh, B. Bhowmick, “Effect of Temperature on Reliability Issues of Ferroelectric Dopant
Segregated Schottky Barrier Tunnel Field Effect Transistor (Fe DS-SBTFET),” Silicon, 2019.
.
[5] P. Ghosh, B. Bhowmick, “Reduction of the kink effect in a SELBOX tunnel FET and its RF/analog
performance,” Journal of Computational Electronics, pp. 1-10, 2019.
01901382-8.
[6] P. Ghosh, B. Bhowmick “Optimization of Ferroelectric SELBOX TFET and Ferroelectric SOI TFET”,
ECS Journal of Solid State Science and Technology, vol. 9, IOP science, 2020.
.
[7] P. Ghosh, B. Bhowmick, “Deep insight into material-dependent DC performance of Fe DS-SBTFET
and its noise analysis in the presence of interface traps”, AEU- International Journal of Electronics and
Communications, vol. 117, 2020. .
[8] P. Ghosh, A. Roy, B. Bhowmick, “The impact of donor/acceptor types of interface traps on selective
buried oxide TFET characteristics”, Applied Physics A, vol. 126, pp. 1-7, 2020. 10.1007/s00339-020-
03505-6.
[9] P. Ghosh, B. Bhowmick, “Effect of temperature in selective buried oxide TFET in the presence of trap
and its RF analysis,” International Journal of RF and Microwave Computer‐Aided Engineering, vol. 30,
pp. 1-9, 2020. .
[10] P. Ghosh, B. Bhowmick, “Analysis of kink reduction and reliability issues in low-voltage DTD-based
SOI TFET,” Micro & Nano Letters, vol. 15, pp. 130-135, 2020. 10.1049/.
[11] P. Ghosh, R. Goswami and, B. Bhowmick, “Optimization of ferroelectric tunnel junction TFET in
presence of temperature and its RF analysis”, Microelectronics Journal, 92, (1-5), 2019.
.
[12] P. Ghosh, B. Bhowmick, “Investigation of Electrical Characteristics in a Ferroelectric L-patterned Gate
Dual Tunnel Diode TFET”, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, pp.
1-6, 2020. 10.1109/