Publications
1). Maisagalla Gopal, Vishal Sharma and Santosh Kumar Vishvakarma “Evaluation of Static Noise Margin (SNM) of 6T SRAM Cell using SiGe/SiC Asymmetric Dual-k Spacer FinFETs” IET Micro & Nano Letters, Volume 12, Issue 12, pp. 1028 – 1032, December 2017.
2). Maisagalla Gopal, Vishal Sharma and Santosh Kumar Vishvakarma, “SiGe Asymmetric Dual-k Spacer FinFETs-based 6T SRAM Cell to Mitigate Read-Write Conflict,” Journal of Nanoelectronics and Optoelectronics (JNO), ASP, Volume 13, No. 5, pp. 467-471, April 2018.
3). Maisagalla Gopal, Atul Awadhiya, Nandakishor Yadav, Santosh Kumar Vishvakarma and Vaibhav Neema “Impact of Varying Carbon Concentration in SiC S/D Asymmetric Dual-k Spacer for High Performance and Reliable FinFET,” Journal of Semiconductors, IOP, Volume 39, No. 9, pp. 1-6, September 2018.
4). Vishal Sharma, Maisagalla Gopal, Pooran Singh and Santosh Kumar Vishvakarma, “A 220mV Robust Read-Decoupled Partial Feedback Cutting based Low-Leakage 9T SRAM for Internet of Things (IoT) Applications,” International Journal of Electronics and Communications, Elsevier, Volume 87, pp. 144-157, April 2018.
5). Vishal Sharma, Maisagalla Gopal, Pooran Singh, Santosh Kumar Vishvakarma and Shailesh Singh Chouhan, “A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications,” Analog Integrated Circuits and Signal Processing, Springer, Volume 98, pp. 331-346, February 2019.
6). Vishal Sharma, Pranshu Bisht, Abhishek Dalal, Maisagalla Gopal, Santosh Kumar Vishvakarma and Shailesh Singh Chouhan, “Half-select free bit-line sharing 12T SRAM with double-adjacent bits soft error correction and a reconfigurable FPGA for low-power applications,” International Journal of Electronics and Communications, Elsevier, Volume 104, pp. 10-22, May 2019.
7). Maisagalla Gopal and Balwinder Raj, “8T SRAM Cell Design for Dynamic and Leakage Power Reduction”, International Journal of Computer Applications (IJCA), Volume 71, No.9, pp. 43-48, May 2013.
8). Maisagalla Gopal and Balwinder Raj, “Low power 8T SRAM cell design for high stability video applications”, ITSI Transactions on Electrical and Electronics Engineering (ITSI-TEEE), Volume 1, Issue-5, pp. 91-97, July 2013.
9). Maisagalla Gopal and S. K. Vishvakarma, “Effect of Asymmetric Doping on Asymmetric underlap Dual-k Spacer FinFET”, 12th IEEE India International Conference (INDICON-) on Electronics, Energy, Environment, Communications, Computer and Control, 17th- 20th December 2015, New Delhi.
10). Atul Awadhiya, Maisagalla Gopal, Tuhina Bhalla, S.K. Vishvakarma and Vaibhav Neema, “Performance Analysis of SiC S/D with Symmetric Dual-k Spacer n-FinFET”, 3rd IEEE International Conference on Microelectronics, Circuits and Systems (Micro2016), 9th-10th July
2016, Kolkata, India.
11). D. Sivasankar Prasad, Maisagalla Gopal, Ashish Raman and R. K. Sarin, “Designing of Phase and Frequency Detector for low Jitter and high speed applications”, IEEE International Conference on Electrical, Electronics, Signals, Communication and Optimization (EESCO),24-
25 Jan. 2015.
