M Prasannakumar

@srcas.ac.in

Assistant Professor, Department of Electronics
Sri Ramakrishna College of Arts and Science



           

https://researchid.co/prasannakumar

EDUCATION

MSc., M.B.A., M.Phil., (

RESEARCH INTERESTS

Electronics, Digital Circuit Design, VLSI System Design, Thin Films

4

Scholar Citations

1

Scholar h-index

RECENT SCHOLAR PUBLICATIONS

  • Implementation of Carry Select Adder based Vedic Multiplier for minimizing the path delay and to increase the efficiency of the processor
    M Prasannakumar, R Thangavel
     2021

  • Fly Back Converter Based Energy Storage System Using FPGA
    MT Selvan, M Prasannakumar, JC Babu
    International Journal of Modern Electronics and Communication Engineering 2019

  • A Review - Performance analysis of various Multipliers for the design of digital processors
    DRT M.Prasannakumar.
    International Journal of Modern Electronics and Communication Engineering 2018

  • Comparative Analysis of Adders Parallel-Prefix Adder for Their Area, Delay and Power Consumption
    V Sidharthan, M Prasannakumar
    International Journal of Scientific Research in Science and Technology 4 (5 2018

  • Comparitive Analysis of Brent-Kang & Kogge- Stone Parallel-Prefix Adder for Their Area, Delay & Power Consumption
    M Prasannakumar, V Sidharthan, DK Gopalakrishnan
    INDIAN JOURNAL OF APPLIED RESEARCH 5 (10), 480-481 2015

  • Implementation of Parallel Multiplier 4x4 Low Power Design Using FPGA
    MP Kumar, KA Kumar
    Journal of NanoScience and NanoTechnology 2 (2), 182-187 2014

MOST CITED SCHOLAR PUBLICATIONS

  • Implementation of Carry Select Adder based Vedic Multiplier for minimizing the path delay and to increase the efficiency of the processor
    M Prasannakumar, R Thangavel
     2021
    Citations: 1

  • A Review - Performance analysis of various Multipliers for the design of digital processors
    DRT M.Prasannakumar.
    International Journal of Modern Electronics and Communication Engineering 2018
    Citations: 1

  • Comparative Analysis of Adders Parallel-Prefix Adder for Their Area, Delay and Power Consumption
    V Sidharthan, M Prasannakumar
    International Journal of Scientific Research in Science and Technology 4 (5 2018
    Citations: 1

  • Implementation of Parallel Multiplier 4x4 Low Power Design Using FPGA
    MP Kumar, KA Kumar
    Journal of NanoScience and NanoTechnology 2 (2), 182-187 2014
    Citations: 1