Rahul Giridhar Jain

@jspmrscoe.edu.in

Assistant Professor at Electrical Engineering department
Jayawant Shikshan Prasarak Mandal's Rajarshi Shahu College of Engineering, Tathawade, Pune.

Rahul Giridhar Jain


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https://researchid.co/rahul.jain7709

EDUCATION

M. E. Electronics
B. E. Electronics & Telecommunication Engineering
2

Scopus Publications

Scopus Publications

  • Novel δ-doped partially insulated junctionless transistor for mixed signal integrated circuits
    Ganesh C. Patil, Vijaysinh H. Bonge, Mayur M. Malode, Rahul G. Jain
    Superlattices and Microstructures, 2016
    In this paper, δ-doped partially insulated junctionless transistor (δ-Pi-OXJLT) has been proposed which shows that, employing highly doped δ-region below the channel not only reduces the off-state leakage current ( I OFF ) and short channel effects (SCEs) but also reduce the requirements of scaling channel thickness of junctionless transistor (JLT). The comparative analysis of digital and analog circuit performance of proposed δ-Pi-OXJLT, bulk planar (BP) JLT and silicon-on-insulator (SOI) JLT has also been carried out. The digital parameters analyzed in this work are, on-state drive current ( I ON ), I OFF , I ON / I OFF ratio, static power dissipation ( P STAT ) whereas the analog parameters analyzed includes, transconductance ( G M ), transconductance generation factor ( G M / I DS ), intrinsic gain ( G M R O ) and cut-off frequency ( f T ) of the devices. In addition, scaling behavior of the devices is studied for various channel lengths by using the parameters such as drain induced barrier lowering (DIBL) and sub-threshold swing (SS). It has been found that, the proposed δ-Pi-OXJLT shows significant reduction in I OFF , DIBL and SS over BPJLT and SOIJLT devices. Further, I ON and I ON / I OFF ratio in the case of proposed δ-Pi-OXJLT also improves over the BPJLT device. Furthermore, the improvement in analog figures of merit, G M , G M / I DS , G M R O and f T in the case of proposed δ-Pi-OXJLT clearly shows that the proposed δ-Pi-OXJLT is the promising device for mixed signal integrated circuits.
  • A novel partially insulated junctionless transistor for low power nanoscale digital integrated circuits
    Ganesh C. Patil, Vijaysinh H. Bonge, Mayur M. Malode, Rahul G. Jain
    2014 IEEE 2nd International Conference on Emerging Electronics Materials to Devices Icee 2014 Conference Proceedings, 2014
    In this paper, a novel device structure named as partially insulated (Pi-OX) junctionless transistor (JLT) is proposed and the simulated results below 20 nm have been compared with existing silicon-on-insulator (SOI) JLT. Further, drain-induced barrier lowering (DIBL), subthreshold swing (SS), on-state drive current (ION), off-state leakage current (IOFF), ION/IOFF ratio and static power dissipation (PSTAT) of the proposed Pi-OXJLT and SOIJLT has also been compared. It has been found that, IOFF, DIBL and SS in the case of proposed Pi-OXJLT are reduced by 57%, 17% and 10% respectively over the existing SOIJLT device. The fabrication flow of the proposed Pi-OXJLT is proposed.