Design of a 65-nm CMOS Neuromorphic Circuit for Sequential Alphanumeric Pattern Detection With Experimental Verification V Upadhyay, N Singhal, BS Makhdoomi, V Saxena, RK Ranjan, SM Kang IEEE Transactions on Very Large Scale Integration (VLSI) Systems , 2026 2026
Compact Memristor Emulator with SDDP for Integrated Neuromorphic Temporal Learning S Bediga, TK Sharma, A Kalakola, V Upadhyay, RK Ranjan, SM Kang IEEE Transactions on Circuits and Systems for Artificial Intelligence , 2026 2026
An event-driven bioinspired associative learning circuit using CCTA-controlled memcapacitive emulator with spike generation R Jaiswal, BS Makhdoomi, V Upadhyay, RK Ranjan Integration, 102717 , 2026 2026
A Passive Symmetrical Memristor Emulator Circuit with Applications in Square Wave Generator, Chaotic Oscillator, and Digital Logic Gates V Upadhyay, KK Kumar, R Kumar Gupta, V Saxena, RK Ranjan Circuits, Systems, and Signal Processing, 1-27 , 2026 2026
MOST CITED SCHOLAR PUBLICATIONS
Design of a 65-nm CMOS Neuromorphic Circuit for Sequential Alphanumeric Pattern Detection With Experimental Verification V Upadhyay, N Singhal, BS Makhdoomi, V Saxena, RK Ranjan, SM Kang IEEE Transactions on Very Large Scale Integration (VLSI) Systems , 2026 2026
Compact Memristor Emulator with SDDP for Integrated Neuromorphic Temporal Learning S Bediga, TK Sharma, A Kalakola, V Upadhyay, RK Ranjan, SM Kang IEEE Transactions on Circuits and Systems for Artificial Intelligence , 2026 2026
An event-driven bioinspired associative learning circuit using CCTA-controlled memcapacitive emulator with spike generation R Jaiswal, BS Makhdoomi, V Upadhyay, RK Ranjan Integration, 102717 , 2026 2026
A Passive Symmetrical Memristor Emulator Circuit with Applications in Square Wave Generator, Chaotic Oscillator, and Digital Logic Gates V Upadhyay, KK Kumar, R Kumar Gupta, V Saxena, RK Ranjan Circuits, Systems, and Signal Processing, 1-27 , 2026 2026
