Saeid Seyedi
@yuntech.edu.tw
computer, member of Young Researchers Club islamic azad university
National Yunlin University of Science and Technology, Douliou, Taiwan
Mr. Saeid Seyedi is a researcher in the Young Researchers and Elite Club, I.A.U since 2018. His current research is concerned with QCA-based technology and Nano and he has worked on many research projects and has published papers in various journals and conference proceedings. His research interests include Nanotechnology, Quantum-dot Cellular Automata (QCA).
RESEARCH INTERESTS
Computer- Cloud- QCA- NANO
Scopus Publications
Scholar Citations
Scholar h-index
Scholar i10-index
Scopus Publications
Saeid Seyedi and Behrouz Pourghebleh
Springer Science and Business Media LLC
Saeid Seyedi, Nima Jafari Navimipour, and Akira Otsuki
MDPI AG
A nano-scale quantum-dot cellular automaton (QCA) is one of the most promising replacements for CMOS technology. Despite the potential advantages of this technology, QCA circuits are frequently plagued by numerous forms of manufacturing faults (such as a missing cell, extra cell, displacement cell, and rotated cell), making them prone to failure. As a result, in QCA technology, the design of reversible circuits has received much attention. Reversible circuits are resistant to many kinds of faults due to their inherent properties and have the possibility of data reversibility, which is important. Therefore, this research proposes a new reversible gate, followed by a new 3 × 3 reversible gate. The proposed structure does not need rotated cells and only uses one layer, increasing the design’s manufacturability. QCADesigner-E and the Euler method on coherence vector (w/energy) are employed to simulate the proposed structure. The 3 × 3 reversible circuit consists of 21 cells that take up just 0.046 µm2. Compared to the existing QCA-based single-layer reversible circuit, the proposed reversible circuit minimizes cell count, area, and delay. Furthermore, the energy consumption is studied, confirming the optimal energy consumption pattern in the proposed circuit. The proposed reversible 3 × 3 circuit dissipates average energy of 1.36 (eV) and overall energy of 1.49 (eV). Finally, the quantum cost for implementing the reversible circuits indicates a lower value than that of all the other examined circuits.
Saeid Seyedi and Nima Jafari Navimipour
Wiley
Saeid Seyedi and Nima Jafari Navimipour
Elsevier BV
Saeid Seyedi and Nima Jafari Navimipour
World Scientific Pub Co Pte Ltd
Because of the high speed, low-power consumption, low latency and possible use at the atomic and molecular levels, Quantum-dot Cellular Automata (QCA) technology is one of the future nanoscale technologies that can replace the present transistor-based technology. For the purpose of creating QCA circuits, reversible logic can be regarded as an appropriate candidate. In this research, a new structure for multi-operative reversible designs is suggested. The Saeid Nima Gate (SNG), proposed in this research study, is a brand-new, incredibly effective, multi-operative, universal reversible gate implemented in QCA nanotechnology employing both majority and inverter gates. Reversible gates, also known as reversible logic gates, are gates that have n inputs and n outputs, which is an equal number of inputs and outputs. The amount of energy lost during computations will be reduced if the numbers of inputs and outputs are identical. The proposed gate is modified and reorganized to optimize further, employing exact QCA cell interaction. All fundamental logic gates are implemented using it to demonstrate the universality of the proposed SNG. Reversible logic has advanced, and as a result, our suggested solution has a lower quantum cost than previously reported systems. The suggested design is simulated using the QCADesigner-E tools.
Saeid Seyedi, Behrouz Pourghebleh, and Nima Jafari Navimipour
Institution of Engineering and Technology (IET)
Saeid Seyedi and Nima Jafari Navimipour
Springer Science and Business Media LLC
Saeid Seyedi, Nima Jafari Navimipour, and Akira Otsuki
MDPI AG
Quantum-dot Cellular Automata (QCA) is an innovative paradigm bringing hopeful applications in the perceptually novel computing layout in quantum electronics. The circuits manufactured by QCA technology can provide a notable decrease in size, rapid-switching velocity, and ultra-low power utilization. The demultiplexer is a beneficial component to optimize the whole process in any logical design, and therefore is very important in QCA. Moreover, fault-tolerant circuits can improve the reliability of digital circuits by redundancy. Hence, the present investigation illustrates a novel QCA-based fault-tolerant 1:2 demultiplexer construct that employs a two-input AND gate and inverter. The functionality of the suggested layout was executed and evaluated with the utilization of the QCADesigner 2.0.3 simulator. This paper utilizes cell redundancy on the wire, inverter, and AND gates for designing a fault-tolerant demultiplexer. Four components (i.e., missing cells, dislocation cells, extra cells, and misalignment) were analyzed by the QCADesigner simulator. The simulation results demonstrated that our proposed QCA-based fault-tolerant 1:2 demultiplexer acted more efficiently than prior constructs regarding delay and fault tolerance. The proposed fault-tolerant 1:2 demultiplexer could attain high fault-tolerance when single missing cell or extra cell faults exist in the QCA layout.
Saeid Seyedi, Akira Otsuki, and Nima Jafari Navimipour
MDPI AG
Quantum-dot cellular automata (QCA) nanotechnology is a practical suggestion for replacing present silicon-based technologies. It provides many benefits, such as low power usage, high velocity, and an extreme density of logic functions on a chip. In contrast, designing circuits with no waste of information (reversible circuits) may further reduce energy losses. The Feynman gate has been recognized as one of the most famous QCA-based gates for this purpose. Since reversible gates are significant, this paper develops a new optimized reversible double Feynman gate that uses efficient arithmetic elements as its key structural blocks. Additionally, we used several modeling principles to make it consistent and more robust against noise. Moreover, we examined the suggested model and compared it to the previous models regarding the complexity, clocking, number of cells, and latency. Furthermore, we applied QCADesigner to monitor the outline and performance of the proposed gate. The results show an acceptable improvement via the designed double Feynman gate in comparison to the existing designs. Finally, the temperature and cost analysis indicated the efficiency of the proposed nan-scale gate.
Saeid Seyedi and Nima Jafari Navimipour
Springer Science and Business Media LLC
Quantum-dot Cellular Automata (QCA) is novel prominent nanotechnology. It promises a substitution to Complementary Metal–Oxide–Semiconductor (CMOS) technology with a higher scale integration, smaller size, faster speed, higher switching frequency, and lower power consumption. It also causes digital circuits to be schematized with incredible velocity and density. The full adder, compressor, and multiplier circuits are the basic units in the QCA technology. Compressors are an important class of arithmetic circuits, and researchers can use quantum compressors in the structure of complex systems. In this paper, first, a novel three-input multi-layer full-adder in QCA technology is designed, and based on it, a new multi-layer 4:2 compressor is presented. The proposed QCA-based full-adder and compressor uses an XOR gate. The proposed design offers good performance regarding the delay, area size, and cell number comparing to the existing ones. Also, in this gate, the output signal is not enclosed, and we can use it easily. The accuracy of the suggested circuits has been assessed with the utilization of QCADesigner 2.0.3. The results show that the proposed 4:2 compressor architecture utilizes 75 cell and 1.25 clock phases, which are efficient than other designs.
Saeid Seyedi and Nima Jafari Navimipour
Informa UK Limited
Saeid Seyedi, Alireza Ghanbari, and Nima Jafari Navimipour
Allerton Press
Quantum-dot cellular automata (QCA) is a new computing paradigm based on cellular automata with appealing characteristics such as high speed, low power consumption, and high density for realizing quantum computers. On the other hand, an adder is the primary circuit in any digital processor and ripple carry adder is a basic building block of other adders. Therefore, efficient design of this type of adder may lead to the efficient design of the whole system. So, in this paper, a new design of ripple carry adder is proposed to decrease the number of cells and area as possible. Simulation results using QCA Designer verifies the correctness of the proposed circuit and validates its efficiency in terms of a number of cells and area.
Saeid Seyedi, Mehdi Darbandi, and Nima Jafari Navimipour
Elsevier BV
Abstract Recently, Complementary Metal-Oxide-Semiconductor (CMOS) technology is limited by many barriers such as short channel effects and high power dissipation. Therefore, many alternatives are proposed to solve these shortages. One of the potential alternatives to CMOS is Quantum-dot Cellular Automaton (QCA) where binary information is encoded by using the electron location in a square cell. However, three types of fault (cell misalignment, cell missing, and cell dislocation) may cause the failure of the QCA-based designs. On the other hand, D-latch is one of the basic circuits in designing larger components such as counters and memories. Therefore, in this paper, a new fault-tolerance QCA-based D-latch is proposed and its performance is evaluated. The obtained results using QCADesigner have revealed that the proposed design produce correct output and thereby can tolerate 86% single-cell omission defects. Also, it has acceptable performance regarding the two and three cellular defects.
Saeid Seyedi and Nima Jafari Navimipour
Springer Science and Business Media LLC
Quantum-dot Cellular Automata (QCA) has been potentially considered as a supersede to Complementary Metal–Oxide–Semiconductor (CMOS) because of its inherent advantages. Many QCA-based logic circuits with smaller feature size, improved operating frequency, and lower power consumption than CMOS have been offered. This technology works based on electron relations inside quantum-dots. Due to the importance of designing an optimized decoder in any digital circuit, in this paper, we design, implement and simulate a new 2-to-4 decoder based on QCA with low delay, area, and complexity. The logic functionality of the 2-to-4 decoder is verified using the QCADesigner tool. The results have shown that the proposed QCA-based decoder has high performance in terms of a number of cells, covered area, and time delay. Due to the lower clock pulse frequency, the proposed 2-to-4 decoder is helpful for building QCA-based sequential digital circuits with high performance.
Saeid Seyedi and Nima Jafari Navimipour
Elsevier BV
Abstract Quantum-dot Cellular Automata (QCA) has emerged as an attractive alternative to Complementary Metal Oxide Semiconductor (CMOS) technology in the nanoscale era. In designing arithmetic circuits, an efficient adder can play a significant role. The next generation of digital systems will be used QCA as desired technology. The QCA computational and arithmetic systems will be facilitated using an efficient QCA-based full-adder. The defects of manufacturing and variations still remain as a problem in QCA-based circuits. Being unreliable and error-prone are the weaknesses of these circuits. Therefore, in this paper, a novel QCA-based fault-tolerant full-adder design using cells redundancy is suggested. Three elements such as misalignment, missing and dislocation cells are important in analyzing the fault properties. Further, this paper aims to study the functionality and the fault-tolerant property of the proposed full-adder in the presence of QCA deposition faults. The obtained results using QCADesigner have demonstrated the proposed full-adder has better performance in terms of latency, complexity, and area in comparison to the previous full-adder designs. Also, the redundant version of full-adder has simple and strong structure compared to standard styles.
Saeid Seyedi and Nima Jafari Navimipour
Elsevier BV
Abstract Quantum-Dot Cellular Automata (QCA) technology uses quantum dots instead of transistors and diodes for performing the logical operation. Also, in logical circuits, many operations, such as multiplication, subtraction, and division are done using the adders. Therefore, this paper presents an efficient QCA-based adder design based on three layers. In contrast to the previous designs, the outputs in the proposed design come out from another side of the circuit which causes more efficient circuit design. In the proposed design, the input signals are not surrounded by the other cells and can easily be accessed. The simulation results using the QCA Designer approve that the offered circuit acts well and can be used as a high-performance design in the QCA. Also, they show that the design causes very low complexity, small area, short latency and fewer cell numbers.