ARINDAM SADHU

EDUCATION

Persuing Ph.D.

RESEARCH INTERESTS

Quantum computing, Quantum Dot Cellular Automata, Low power CMOS circuit design, Embedded System

Scopus Publications

Utilization of Two Cross Two Switch for Bitonic Sorting Circuit
Subhasree Bhattacharjee, Soumyadip Sarkar, Kunal Das, Arindam Sadhu, and Bikramjit Sarkar
Bentham Science Publishers Ltd.
Background: The synthesis of reversible logic has gained prominence as a crucial research area, particularly in the context of post-CMOS computing devices, notably quantum computing. Objective: To implement the bitonic sorting circuit, 2x2 switch, is used. The overarching objective of implementing a reversible sorting circuit is to mitigate power consumption while promising secure communication. The successful implementation of the bitonic sorting circuit utilizing the proposed 2x2 switch is validated through simulations conducted in IBM Qiskit. Methods: This study begins by employing the control swap gate to implement a 2x2 switch, aimed at enabling concurrent computing operations within multiprocessor systems to enhance throughput. Subsequently, following the successful implementation of the 2x2 switch, the study proceeds to design a bitonic sorting circuit. Results: Bitonic sort using a 2x2 switch on the IBM Quantum Experience (IBMQ) platform via the QISKit SDK in Python 3.6. Specifically, Qiskit v0.29.0 is utilized, with OpenQASM. OpenQASM serves as the quantum assembly and instruction language. Conclusion: This work presents a methodology for constructing a 2x2 switch, utilizing a reversible control swap gate as its core component. Additionally, it demonstrates the intricate development and implementation of a bitonic sorting circuit, capitalizing on this innovative switch architecture.


Statistical Analysis on Optimal Lockdown Schedule by Developing a Multivariate Prediction model SEIRDVIm




Hybrid-quantum approach for the optimal lockdown to stop the SARS-CoV-2 community spread subject to maximising nation economy globally
Kunal Das, Sahil Zaman, Alex Khan, Arindam Sadhu, Subhasree Bhattacharjee, Faisal Shah Khan, and Bikramjit Sarkar
Institution of Engineering and Technology (IET)
AbstractSARS‐CoV‐2 epidemic (severe acute respiratory corona virus 2 syndromes) has caused major impacts on a global scale. Several countries, including India, Europe, U.S.A., introduced a full state/nation lockdown to minimise the disease transmission through human interaction after the virus entered the population and to minimise the loss of human life. Millions of people have gone unemployed due to lockdown implementation, resulting in business and industry closure and leading to a national economic slowdown. Therefore, preventing the spread of the COVID‐19 virus in the world while also preserving the global economy is an essential problem requiring an effective and immediate solution. Using the compartmental epidemiology S, E, I, R or D (Susceptible, Exposed, Infectious, Recovery or Death) model extended to multiple population regions, the authors predict the evolution of the SARS‐CoV‐2 disease and construct an optimally scheduled lockdown calendar to execute lockdown over phases, using the well‐known Knapsack problem. A comparative analysis of both classical and quantum models shows that our model decreases SARS‐CoV‐2 active cases while retaining the average global economic factor, Gross Domestic Product, in contrast to the scenario with no lockdown.


Exploit Reversible Gates to Implement Fast Quantum Sorting Algorithm
Subhasree Bhattacharjee, Kunal Das, Arindam Sadhu, Soumyadip Sarkar, and Bikramjit Sarkar
Springer Nature Singapore



Comparative analysis of the impact of epidemiological modeling on COVID-19
Subhasree Bhattacharjee, Kunal Das, Sahil Zaman, Arnab Naha, Arindam Sadhu, Suman Kumar Roy, Faisal Shah Khan, and Bikramjit Sarkar
De Gruyter



Hybrid Genetic Algorithm Random Forest algorithm (HGARF) for improving the missing value Imputation in Hepatitis Medical Dataset
Pijush Dutta, Shobhandeb Paul, Gour Gopal Jana, and Arindam Sadhu
IEEE
It has always been difficult to make an exact prediction when there are many missing numbers in the data collection. To solve this problem, the majority of hybrid models either removed the absent cases from the data collection or used a default method to fill in the blanks. In the study described in this article, an improved genetic algorithm metaheuristics-based forecasting model is suggested to forecast the number of confirmed instances of hepatitis. The Random Forest's characteristics are chosen using the improved genetic method, which also improves the efficiency and accuracy of the prediction model overall. On standard medical data sets for Hepatitis from the UCI Repository of Machine Learning, the effectiveness of the suggested model as a predictive categorization system is examined. In addition to accuracy, sensitivity, specificity; and the area under ROC are also computed. The proposed method was contrasted with various current state-of-the-art approaches that were examined in the same setting and using the same datasets. Based on the outcomes of the simulations and the comparative analysis that was done, it was found that the suggested hybrid method outperformed more complex ones with an accuracy of 93.91% and that it could be applied to other prediction models.


Experimental study on the quantum search algorithm over structured datasets using IBMQ experience
Kunal Das and Arindam Sadhu
Elsevier BV



Power analysis attack resistable hardware cryptographical circuit design using reversible logic gate in quantum cellular automata
Puspak Pain, Kunal Das, Arindam Sadhu, Maitreyi Ray Kanjilal, and Debashis De
Springer Science and Business Media LLC
Quantum-dot cellular automata (QCA) technology leads to rapid high-density combinatory low power exploitation to realize the reversible logic circuit in the nanoscale era. Reversible logic is an alternative to overcome excess energy indulgence of irreversible process. This paper illustrates a cost-effective, energy-efficient Universal Reversible Logic Gate in QCA framework which is capable of designing power analysis attack resistable hardware cryptographical circuit. The proposed (URLGs: U1 and U2) has been tested with simulator QCADesigner V2.0.3, outshined the existing pattern relating to the area, gate count, garbage count, and quantum cost. We found 37.5% garbage minimization is achieved compared to NFT, which is utmost minimization of garbage ever reported in QCA literature. Thirteen three variable standard Boolean functions are considered as logic benchmarks to guesstimate the capability and efficiency of proposed URLG in QCA circuit implementation and synthesizing logic gates. In average, our proposed U2 achieved 36.66% improvement in energy dissipation for different kink energy ratios over early reported work.


Low power design methodology in quantum-dot cellular automata
Arindam Sadhu, Kunal Das, Debashis De, and Maitreyi Ray Kanjilal
Elsevier BV



A QCA-Based Improvised TRNG Design for the Implementation of Secured Nano Communication Protocol in ATM Services
Arindam Sadhu, Kunal Das, Debashis De, Maitreyi Ray Kanjilal, and Pritam Bhattacharjee
Springer Singapore



Quantum Random Number Generators for Cryptography: Design and Evaluation
Puspak Pain, Arindam Sadhu, Kunal Das, and Maitreyi Ray Kanjilal
Springer Singapore



Energy efficient configurable layout of logic block in QCA frame work for an FPGA
Arindam Sadhu, Rimpa Dey Sarkar, Kunal Das, Debashis De, and Maitreyi Ray Kanjilal
Bentham Science Publishers Ltd.
Aims: Embedded system plays a vital role in today’s life. Hence, our interest is in areadelay- energy efficient embedded system design in post-CMOS technology, i.e., QCA. Objectives: The research is focused on efficient area-delay-energy Configurable Logic Block (CLB) design for Field-Programmable Gate Array architecture (FPGA) with successful simulation-based on next-generation technology, Quantum-dot cellular automata. Methods: Each proposed circuit is designed on post CMOS 4 dot 2 electron technology, i.e. QCA (Quantum dot Cellular Automata), is adopted in circuit implementation due to low power dissipation, high clock frequency and high package density. QCADesigner is used to verify the functionality of every circuit. QCAPro tool is used for determining power dissipation. Results: In contrast, a new approach of using de-multiplexer replacing the decoder has been introduced that results in the reduction of the average energy dissipation by almost 57%. A NOR based D flip-flop memory architecture and multiplexer are also used in the lookup table for the configurable logic block. The proposed architecture thus reduces the overall latency. The proposed CLB consists of 6356 QCA cells covering 7.44 um2 area. Write and read latency of proposed CLB are 12 and 7.25 QCA clock, respectively. Conclusion: The present paper concludes that read and write latency reduction occurs; average energy dissipation, leakage, and switching energy dissipation are reduced in a large amount resulting in an advantage of the overall minimization of the latency for the proposed CLB in the process.


Tile-based N-variable Symmetric Logic Function Syntheses in Quantum-dot Cellular Automata
Arindam Sadhu, Kunal Das, Debashis De, and Maitreyi Ray Kanjilal
IEEE
Tile Nanostructures in Quantum-dot Cellular Automata (QCA) are proved to be a robust and reliable structure to fabricate the logic device. In this scientific attempt, we have focused on N-variable symmetric Logic function synthesis in Quantum-dot Cellular Automata with tile nanostructure. Coupled Majority-minority voter (CMmV) voter is applied to implement 2 –variable and 3 –variable logic syntheses in Quantum-dot Cellular Automata. The N-variable symmetric logic function is applicable to implement any logic circuit. Two and three variables Quantum-dot Cellular Automata symmetric logic functions are synthesized in this article. Hence any digital logic circuit can be implemented with proposed Coupled Majority-minority voter (CMmV).


SSTRNG: self starved feedback SRAM based true random number generator using quantum cellular automata
Arindam Sadhu, Kunal Das, Debashis De, and Maitreyi Ray Kanjilal
Springer Science and Business Media LLC
The information are need to modulate using irreproducible and unpredictable digital bit stream to get a secure digital communication systems. Hence, True random number generator (TRNG) is a significant aspirant in digital circuit to yield unpredictable digital bit stream. In this assignment self starved feedback SRAM based TRNG is proposed in quantum cellular automata (QCA) technology. Moreover, QCA technology is adopted to design TRNG components due to its features like ultra low power dissipation, low area and ultra high operating frequency. The proposed TRNG is comprised of self starved feedback circuit and floating clock generator. Again, the basis of self starved feedback circuit is a single bit QCA SRAM cell, which extracts the random digital bit. Furthermore, to enhance the randomness, floating clock generator is implemented across self starved feedback circuits input. The functionality of proposed TRNG is accomplished through QCA Designer tool and its architecture is also passed NIST statistical test of randomness. Hence proposed 8 bit TRNG can be interpreted as a novel contender for security applications due to its 14.82 GHz operating frequency, 0.36 μm 2 area, latency of 1 QCA clock cycle, 28.53 meV average power dissipation and high tail probability of NIST test battery report in QCA technology.


Area-Delay-Energy aware SRAM memory cell and M × N parallel read/write memory array design for quantum dot cellular automata
Arindam Sadhu, Kunal Das, Debashis De, and Maitreyi Ray Kanjilal
Elsevier BV



MVTRNG: Majority voter-based crossed loop quantum true random number generator in QCA nanotechnology
Arindam Sadhu, Kunal Das, Debashis De, and Maitreyi Ray Kanjilal
Springer Singapore
True random number generator, commonly known as TRNG, is an important candidate in today’s cryptography process. TRNG is only innovative design which can generate non-deterministic and unique digital bit stream to any communication systems or secured system. Quantum cellular automata (QCA) technology is adopted to design TRNG due to its low area, ultra high operating frequency, and low power dissipation. This article presents a QCA majority voter-based TRNG, which is comprised of crossed loop circuit and seed circuit. The random bits are extracted from crossed loop circuit which is composed of “OR” gate. Again the seed circuits are used here to enhance the unpredictability of generated number sequence and quality of random number. The proposed TRNG design is verified through QCADesigner tool 2.0.3, and its architecture is passed industry standard successfully. In area, latency, and energy point of view, the proposed 8-bit TRNG is consumed 0.36 um2 area, 1 QCA clock cycle latency, and 49.7 mev energy (per bit). So, proposed TRNG will be interpreted as a promising design in next-generation cryptography domain.


Physical proof and simulation of ternary logic gate in ternary quantum dot cellular automata
Puspak Pain, Arindam Sadhu, Kunal Das, and Maitreyi Ray Kanjilal
Springer Singapore
Ternary quantum dot cellular automata (tQCA) is an emerging as well as an interesting field of research area after successful fabrication of binary QCA. Ternary logic is a critical choice for solving greater data storage, faster arithmetic operation on complex data, and so on. In this paper, tQCA basic logic gates like ternary AND, OR, NOT gates and buffers have been reported. tQCA layout for basic logic gates is simulated with tQCA simulation software (TQCA_1.7.0.2). Involvement of coulombic interactive force is also explored as physical proof of NOT gate operation in eight-dot tQCA device model.


Cost Optimization Technique for Quantum Circuits
Anirban Basak, Arindam Sadhu, Kunal Das, and Kapil K. Sharma
Springer Science and Business Media LLC
In this paper, an attempt is made to present a method of quantum cost minimization or optimization technique for quantum reversible circuits using proposed merger rules in Exclusive Sum of Product (ESOP) method. These modified ESOP methods are used to minimize the quantum circuits. We found that the quantum cost is drastically decreased than the previous ESOP method. It will be easy to find the quantum cost and quantum gate optimized quantum circuits implementation. It will also reduce quantum error while the quantum circuit is executed in real quantum processor.


Novel True Random Number Generator Based Hardware Cryptographic Architecture Using Quantum-Dot Cellular Automata
Puspak Pain, Kunal Das, Arindam Sadhu, Maitreyi Ray Kanjilal, and Debashis De
Springer Science and Business Media LLC
Information processing and conventional computing are usually resource constrained; evermore they need to operate in a physically suspicious environment. Consequently, communication architectures, protocol and its security aspects have been the focus of many recent research works. Our proposal demonstrates how to amend this vulnerable circumstance through a three-stage security scheme in quantum-dot cellular automata (QCA) based nano-architecture. The primary objective of this hardware-based cryptographic architecture using QCA is to intend a distinctly secure communication architecture comprising less number of QCA cells, which enchant the comparative performance investigation along with the power-area constraints. In our proposed design the random bits are extorted from an asymmetrically arranged crossed loop TRNG where the seed circuits are used to boost the volatility of initiated number sequences as well as the distinction of the random numbers. In this work, a novel encryption-decryption prototype for a secure communication system has been implemented. The simulation results are obtained from QCADesigner tool v2.0.3, which fruitfully agreed with the industry standard. An intact evaluation of the proposed TRNG and the comparative analysis with a recent work of TRNG has been authorized by the 7.79% improvements in average energy dissipation for different Kink energy ratio. Altogether the proposed architecture and its contemporary implementation in QCA framework can be recognized by means of the advantages in 7.02% circuit complexity, 11.53% area, and 13.77% average leakage power dissipation with respect to the recent work of TRNG. Thus our proposed novel TRNG based hardware cryptographic architecture can be considered as a potential next-generation network-on-chip (NoC) realization for a large-scale cryptosystem in QCA technology.


Design and simulation of priority based dual port memory in quantum dot cellular automata
Kunal Das, Arindam Sadhu, Debashis De, and Jadav Chandra Das
Elsevier BV



A register-transfer-level description of synthesizable binary multiplier and binary divider
Pritam Bhattacharjee, Arindam Sadhu, and Kunal Das
IEEE
The paper depicts the RTL (Register Transfer Level) description of Binary Multiplier and Binary Divider. The descriptions are synchronized to the operating clock of the microprocessor. The major operations that get a highlight in this paper is that the multiplier and divider are synthesizable. VHDL (Very High Specific Integrated Circuit - Hardware Description Language) is the language of construct for the design. This work focuses to show that synchronized applications can be implemented at the front-end level of VLSI design methodology.

RECENT SCHOLAR PUBLICATIONS

Design and Forecasting Models for Disease Management
P Dutta, S Mandal, K Cengiz, A Sadhu, GG Jana
John Wiley & Sons 2025



Diabetes Prediction Using a Hybrid PCA‐Based Feature Selection and Computational Machine Learning Algorithm
S Dey, P Dutta, GG Jana, A Sadhu
Design and Forecasting Models for Disease Management, 253-268 2025



Utilization of Two Cross Two Switch for Bitonic Sorting Circuit
S Bhattacharjee, S Sarkar, K Das, A Sadhu, B Sarkar
Micro and Nanosystems 17 (1), 45-57 2025



Implementation Of Two Cross Two Switch To Implement Bitonic Sorting Circuit
S Bhattacharjee, S Sarkar, K Das, A Sadhu, B Sarkar
2024



Hybrid‐quantum approach for the optimal lockdown to stop the SARS‐CoV‐2 community spread subject to maximising nation economy globally
K Das, S Zaman, A Khan, A Sadhu, S Bhattacharjee, FS Khan, B Sarkar
IET Quantum Communication 5 (1), 19-37 2024



AI-based smart prediction of liquid flow system using machine learning approach
P Dutta, GG Jana, S Paul, S Pal, S Dey, A Sadhu
Int. J. Eng. Manuf.(IJEM) 1, 53-65 2024



Exploit Reversible Gates to Implement Fast Quantum Sorting Algorithm
S Bhattacharjee, K Das, A Sadhu, S Sarkar, B Sarkar
International Conference on Computer & Communication Technologies, 125-134 2023



Comparative analysis of the impact of epidemiological modeling on COVID-19
S Bhattacharjee, K Das, S Zaman, A Sadhu, SK Roy, A Naha, B Sarkar
Computer Intelligence Against Pandemics: Tools and Methods to Face New 2023



COMPARATIVE STUDY ON LEARNING BASED OVERSAMPLING MODEL FOR PREDICTION OF PCOS
SS Pijush Dutta, Arindam Sadhu, Gour Gopal Jana, Suchismita Maiti, Soumya ...
European Chemical Bulletin 12 (10), 5727-5738 2023



Hybrid genetic algorithm random forest algorithm (HGARF) for improving the missing value imputation in hepatitis medical dataset
P Dutta, S Paul, GG Jana, A Sadhu
2023 international symposium on devices, circuits and systems (ISDCS) 1, 01-05 2023



Performance of Automated Machine Learning Based Neural Network Estimators for the Classification of PCOS
P Dutta, S Paul, A Sadhu, GG Jana, P Bhattacharjee
Doctoral Symposium on Human Centered Computing, 65-73 2023



Design and Implementation of Multi-Operative Reversible Gate for Even/Odd Parity Generators in Quantum Based Technologies
P Pain, A Sadhu, K Das, MR Kanjilal
J. Comput. Mech. Manag 2, 20-28 2023



Experimental study on the quantum search algorithm over structured datasets using IBMQ experience
K Das, A Sadhu
Journal of King Saud University-Computer and Information Sciences 34 (8 2022



Challenges and trends on post-quantum cryptography
K Das, A Sadhu
Internet of Things: Security and Privacy in Cyberspace, 271-293 2022



Low power design methodology in quantum-dot cellular automata
A Sadhu, K Das, D De, MR Kanjilal
Computers & Electrical Engineering 97, 107638 2022



Quantum random number generators for cryptography: Design and evaluation
P Pain, A Sadhu, K Das, MR Kanjilal
Computational Advancement in Communication, Circuits and Systems 2022



A QCA-Based Improvised TRNG Design for the Implementation of Secured Nano Communication Protocol in ATM Services
A Sadhu, K Das, D De, MR Kanjilal, P Bhattacharjee
Computational Advancement in Communication, Circuits and Systems 2022



Quantum Random Number Generators for Cryptography: Design
P Pain, A Sadhu, K Das, MR Kanjilal
Computational Advancement in Communication, Circuits and Systems 2021



A QCA-Based Improvised TRNG Design for the Implementation of Secured Nano
A Sadhu, K Das, D De, MR Kanjilal, P Bhattacharjee
Computational Advancement in Communication, Circuits and Systems 2021



Hybrid-Quantum approach for the optimal lockdown to stop the SARS-CoV-2 community spread subject to maximizing nation economy globally
FSK Sahil Zaman, Alex Khan, Arindam Sadhu, Kunal Das
https://doi.org/10.1101/2021.06.14.21258907 2021

MOST CITED SCHOLAR PUBLICATIONS

Area-Delay-Energy aware SRAM memory cell and M N parallel read/write memory array design for quantum dot cellular automata
A Sadhu, K Das, D De, MR Kanjilal
Microprocessors and Microsystems 72, 102944 2020
Citations: 31



SSTRNG: self starved feedback SRAM based true random number generator using quantum cellular automata
A Sadhu, K Das, D De, MR Kanjilal
Microsystem Technologies 26, 2203-2215 2020
Citations: 17



Experimental study on the quantum search algorithm over structured datasets using IBMQ experience
K Das, A Sadhu
Journal of King Saud University-Computer and Information Sciences 34 (8 2022
Citations: 16



Design and simulation of priority based dual port memory in quantum dot cellular automata
K Das, A Sadhu, D De, JC Das
Microprocessors and Microsystems 69, 118-137 2019
Citations: 13



Power analysis attack resistable hardware cryptographical circuit design using reversible logic gate in quantum cellular automata
P Pain, K Das, A Sadhu, MR Kanjilal, D De
Microsystem Technologies, 1-13 2019
Citations: 13



VLSI Transistor and Interconnect Scaling Overview
P Bhattacharjee, A Sadhu
Journal of Electronic Design Technology 5 (1), 1-15 2014
Citations: 12



Low power design methodology in quantum-dot cellular automata
A Sadhu, K Das, D De, MR Kanjilal
Computers & Electrical Engineering 97, 107638 2022
Citations: 10



Novel true random number generator based hardware cryptographic architecture using quantum-dot cellular automata
P Pain, K Das, A Sadhu, MR Kanjilal, D De
International Journal of Theoretical Physics 58, 3118-3137 2019
Citations: 10



Hybrid genetic algorithm random forest algorithm (HGARF) for improving the missing value imputation in hepatitis medical dataset
P Dutta, S Paul, GG Jana, A Sadhu
2023 international symposium on devices, circuits and systems (ISDCS) 1, 01-05 2023
Citations: 9



MVTRNG: majority voter-based crossed loop quantum true random number generator in QCA nanotechnology
A Sadhu, K Das, D De, MR Kanjilal
Computational Advancement in Communication Circuits and Systems: Proceedings 2020
Citations: 8



Design and Implementation of Multi-Operative Reversible Gate for Even/Odd Parity Generators in Quantum Based Technologies
P Pain, A Sadhu, K Das, MR Kanjilal
J. Comput. Mech. Manag 2, 20-28 2023
Citations: 6



Physical proof and simulation of ternary logic gate in ternary quantum dot cellular automata
P Pain, A Sadhu, K Das, MR Kanjilal
Computational Advancement in Communication Circuits and Systems: Proceedings 2020
Citations: 6



Challenges and trends on post-quantum cryptography
K Das, A Sadhu
Internet of Things: Security and Privacy in Cyberspace, 271-293 2022
Citations: 5



Quantum random number generators for cryptography: Design and evaluation
P Pain, A Sadhu, K Das, MR Kanjilal
Computational Advancement in Communication, Circuits and Systems 2022
Citations: 5



Cost optimization technique for quantum circuits
A Basak, A Sadhu, K Das, KK Sharma
International Journal of Theoretical Physics 58, 3158-3179 2019
Citations: 5



Quantum annealing for solving a nurse-physician scheduling problem in covid-19 clinics
K Das, S Zaman, A Sadhu, A Banerjee, FS Khan
viXra 2020
Citations: 4



Performance Estimation of VLSI Design
A Sadhu, P Bhattacherjee, S Koley
2015
Citations: 3



Methodology of Standard Cell Library Design in. LIB Format
A Sadhu, P Bhattacharjee
Journal of VLSI Design Tools & Technology 4 (1), 30-38 2014
Citations: 3



Hybrid‐quantum approach for the optimal lockdown to stop the SARS‐CoV‐2 community spread subject to maximising nation economy globally
K Das, S Zaman, A Khan, A Sadhu, S Bhattacharjee, FS Khan, B Sarkar
IET Quantum Communication 5 (1), 19-37 2024
Citations: 2



AI-based smart prediction of liquid flow system using machine learning approach
P Dutta, GG Jana, S Paul, S Pal, S Dey, A Sadhu
Int. J. Eng. Manuf.(IJEM) 1, 53-65 2024
Citations: 2