K JAYARAM KUMAR

@acet.ac.in

Senior Assistant Professor, Department of ECE
Aditya College of Engineering & Technology



                 

https://researchid.co/jayaram

EDUCATION

(VLSI Based Signal Processing)
M.Tech (VLSI & Embedded Systems)
B.Tech (Electronics and Communication Engineering

RESEARCH, TEACHING, or OTHER INTERESTS

Electrical and Electronic Engineering

10

Scopus Publications

41

Scholar Citations

4

Scholar h-index

1

Scholar i10-index

Scopus Publications

  • Optimizing FIR Filter Efficiency with Advanced Hybrid Multiplier Techniques
    E. Jagadeeswara Rao, M. Grace Mercy, K. Jayaram Kumar, M. Rajanbabu, and K. Sudha Ramya
    World Scientific Pub Co Pte Ltd


  • A Novel Integrated System for Forest Fire Detection using Multiple Adaptive Reduced KELM Models
    Deepak Kholiya, Mummidi Rachel, Arivarasan S, P. Sukumar, K Jayaram Kumar, and T. Aswini Devi
    IEEE
    Forest fires are a leading source of ecological destruction. Damage from fires, particularly in their early stages when the system are difficult to see, can be mitigated by a faster and more accurate detection system. Forest fires are a leading source of ecological destruction. Damage from fires, particularly in their early stages when the system are difficult to see, can be mitigated by a faster and more accurate detection system. According to the proposed method, there are three phases, which include model preparation, feature extraction, and training. Unsharp filtering and a CIEXYZ color space conversion are performed on the input image during the preprocessing phase. The boundary chain code, sphericity, and contour line of the fire utilized for feature extraction could constitute the threshold. It utilized a MARK-ELM to train the model. Compared to MARK and ELM, the proposed technique typically obtains a better accuracy of 93.35 percent.

  • Design of area-efficient high speed 4 × 4 Wallace tree multiplier using quantum-dot cellular automata
    A. Arunkumar Gudivada, K. Jayaram Kumar, Srinivasa Rao Jajula, Durga Prasad Siddani, Praveen Kumar Poola, Varun Vourganti, and Asisa Kumar Panigrahy
    Elsevier BV

  • A systematic journal of multipliers accuracy and performance
    E. Rao, Durgesh Nandan, R. Rajath Krishna and K. J. Kumar
    Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
    Low power and efficient architecture of computer arithmetic is demanded of real time Digital signal processing. Out of all arithmetic units, the multiplier is most important and frequently used arithmetic component in literature. As we know that there are many multipliers exist in the literature and everyone has his own proc-corns. But there is a gap in literature, no one gets compared all popular multiplier technique at same platform and discuss their advantages and limitations at one place. This research work outlines the most popular five multiplier techniques (like Wallace, modified, Vedic, Russian Peasant and Logarithm) and compares them, highlights merits, demerit for further improvements. This comprehensive study includes the systematic development, compares the latest design of every multiplier and justified that which one is better over other reported multiplier is also highlighted.

  • Quantitative analysis of drinking water quality for long term water borne diseases
    Kamidi Prasanth, Sabbi Vamshi Krishna, Sanniti Rama Krishna, and Kondapalli Jayaram Kumar
    Springer Singapore

  • Implementation of low power LFSR’s design through the use of GDI method
    P Soundarya Mala, Ch Srigiri, R Jayaram Kumar, and Srivani Vaddi
    Diva Enterprises Private Limited

  • Advanced multiplier design and implementation using Hancarlson adder
    E. Jagadeeswara Rao, T. Ramanjaneyulu, and K. Jayaram Kumar
    IEEE
    Finite Impulse Response (FIR) filters, microprocessors and digital signal processors are the core system of multipliers. The Multiplier and Accumulator Unit (MAC) is the predominant block in a Digital Signal Processing (DSP) system. The objective of MAC is implementation of signal processing with high performance but multiplier most of the time occupies much area and become power consuming circuits. In this paper, a Modified Russian Peasant Multiplier (MRPM) using Hancarlson adder (HA) has been proposed. According to Russian Rules, a Divide and conquer technique is used in the multiplication process. But, in the perspective of digital design, only shifters and adders are used in the Russian Peasant Multiplier (RPM) to produce a Partial Product Generation (PPG). In this paper, we present an approach towards the reduction of delay in existing RPM by using HA, in the partial product reduction stage and proposed RPM with HA at Partial Product Addition (PPA). The proposed design is also compared to the RPM with Ripple Carry Adder (RCA), Carry Selector Adder (CSA) and 8-2 Adder Compressors (AC) in terms of propagation delay. The proposed design enhances speed of the system by 80.4% compared to the RPM using RCA, 81.7% compared to RPM using CSA and 77.5% compare to RPM with 8:2 adder compressors (AC’s). The total operation is coded with Verilog Hardware Description language (HDL) using Model-Sim 6.3C, synthesized by using the Xilinx Integrated Software Environment (ISE) 14.7 design tool.

  • Square root operation of 64 bit floating point numerical data using verilog coding
    The World Academy of Research in Science and Engineering

  • Design of high speed Wallace tree multiplier using 8-2 and 4-2 adder compressors
    E Jagadeeswara Rao, K Jayaram Kumar, and Dr. T. V. Prasad
    Science Publishing Corporation
    Multiplication is one of the most common arithmetic operations employed in digital systems such as FIR filters and DSP processors but multipliers are the most time, area, and power consuming circuits. Improvement in any of these parameters can be advantageous for improv-ing the efficiency of the circuit. High-speed multiplier which uses the high-speed adder is designed based on the Wallace tree concept in this paper. In this paper first we present an approach towards the reduction of delay in Wallace tree multipliers by using 8:2 and 4:2 adder com-pressors, in the partial product reduction stage. The proposed design is also compared to the Wallace Tree multiplier which uses 4:2 and 8:2 adder compressors in terms of propagation delay. The proposed design enhances speed of the system by 74.1% compared to the conven-tional Wallace Tree multiplier, while 24.1 % reduction was achieved in the delay of the system relative to Wallace tree multiplier with 16-bit adder with one of the 8-2 adder compressors.  

RECENT SCHOLAR PUBLICATIONS

  • Optimizing FIR Filter Efficiency with Advanced Hybrid Multiplier Techniques
    EJ Rao, MG Mercy, KJ Kumar, M Rajanbabu, KS Ramya
    Journal of Circuits, Systems and Computers, 2550144 2025

  • A Novel Integrated System for Forest Fire Detection using Multiple Adaptive Reduced KELM Models
    D Kholiya, M Rachel, P Sukumar, KJ Kumar, TA Devi
    2024 International Conference on Data Science and Network Security (ICDSNS), 1-6 2024

  • Optimizing Pest Detection And Management In Precision Agriculture Through Deep Learning Approaches.
    RVS Praveen, A Shrivastava, R Prasanthi, KH Bindu, KJ Kumar, K Yadav
    Library of Progress-Library Science, Information Technology & Computer 44 (3) 2024

  • WITHDRAWN: Sentiment analysis of product feedback using natural language processing
    P Chitra, TS Karthik, S Nithya, JJ Poornima, JS Rao, M Upadhyaya, ...
    Materials Today: Proceedings 2021

  • Design of area-efficient high speed 4 4 Wallace tree multiplier using quantum-dot cellular automata
    AA Gudivada, KJ Kumar, SR Jajula, DP Siddani, PK Poola, V Vourganti, ...
    Materials Today: Proceedings 45, 1514-1523 2021

  • Automatic pet feeder using internet of things
    JK Kondapalli, VR Sanepu, BS Kothapalli, SPR Peketi, VDN Kukatla
    JETIR 6 (4), 360-367 2019

  • A systematic review of multipliers: accuracy and performance analysis
    EJ Rao, VKRD Nandan, KJ Kumar
    Int J Eng Adv Technol (IJEAT) 8 (6S), 965-969 2019

  • Quantitative analysis of drinking water quality for long term water borne diseases
    K Prasanth, SV Krishna, SR Krishna, KJ Kumar
    Advances in Computing and Data Sciences: Third International Conference 2019

  • Advanced multiplier design and implementation using Hancarlson adder
    EJ Rao, T Ramanjaneyulu, KJ Kumar
    2018 International Conference on Intelligent and Innovative Computing 2018

  • Implementation of Low Power LFSR’s Design through the use of GDI Method
    PS Mala, C Srigiri, RJ Kumar, S Vaddi
    Indian Journal of Public Health 9 (12), 1487 2018

  • Design of high speed Wallace tree multiplier using 8-2 and 4-2 adder compressors
    EJ Rao, KJ Kumar, TV Prasad
    Int J Eng Technol 7 (4), 2386-2390 2018

  • High Speed and Reliable Gray Mapped Polar Codes
    G HANEESHA, KJ KUMAR

  • HIGH-SPEED SUPERIOR BI-ROTATIONAL CORDIC USING QUADRANT AMENDMENT WITH PRE-SCALED STRUCTURAL DESIGN
    KJ KUMAR, PS MALA

MOST CITED SCHOLAR PUBLICATIONS

  • WITHDRAWN: Sentiment analysis of product feedback using natural language processing
    P Chitra, TS Karthik, S Nithya, JJ Poornima, JS Rao, M Upadhyaya, ...
    Materials Today: Proceedings 2021
    Citations: 16

  • A systematic review of multipliers: accuracy and performance analysis
    EJ Rao, VKRD Nandan, KJ Kumar
    Int J Eng Adv Technol (IJEAT) 8 (6S), 965-969 2019
    Citations: 6

  • Automatic pet feeder using internet of things
    JK Kondapalli, VR Sanepu, BS Kothapalli, SPR Peketi, VDN Kukatla
    JETIR 6 (4), 360-367 2019
    Citations: 5

  • Design of area-efficient high speed 4 4 Wallace tree multiplier using quantum-dot cellular automata
    AA Gudivada, KJ Kumar, SR Jajula, DP Siddani, PK Poola, V Vourganti, ...
    Materials Today: Proceedings 45, 1514-1523 2021
    Citations: 4

  • Advanced multiplier design and implementation using Hancarlson adder
    EJ Rao, T Ramanjaneyulu, KJ Kumar
    2018 International Conference on Intelligent and Innovative Computing 2018
    Citations: 4

  • Design of high speed Wallace tree multiplier using 8-2 and 4-2 adder compressors
    EJ Rao, KJ Kumar, TV Prasad
    Int J Eng Technol 7 (4), 2386-2390 2018
    Citations: 4

  • Quantitative analysis of drinking water quality for long term water borne diseases
    K Prasanth, SV Krishna, SR Krishna, KJ Kumar
    Advances in Computing and Data Sciences: Third International Conference 2019
    Citations: 2