Ph.D. in Semiconductor Devices from National Institute of Technology Silchar
M.Tech. in Microelectronics and VLSI Design from National Institute of Technology Silchar
Bridging Memory and Computation: Reimagining Digital Logics through Memristor Technology Dayananda Singh Khwairakpam, Vandana Devi Wangkheirakpam Microelectronics Simulations Modeling and Applications, 2026 Memristors, first theorized by Leon Chua in 1971, represent a groundbreaking advancement in the field of electronics and have evolved into one of the most promising components of modern technology. Their potential to revolutionize fields, such as memory storage, neuromorphic computing, and artificial intelligence (AI), has captured significant attention in both academia and industry. This article offers a glimpse into the current state of memristor technology, from its theoretical origins to present-day applications, with a focus on its deployment in digital logic systems. Four categories of memristor-based digital logic systems are explored demonstrating how their in-memory computing paradigm can implement universally complete logic systems. Discussions include binary IMPLY and FALSE, binary MAGIC, ternary MAGIC, and multiple-switching binary decision trees. By leveraging the dynamic reconfigurability of memristor operating conditions, multiple logic functions can be performed within the same device, while circumventing the need for traditional data transfer between memory and processing unit.
Optimized Channel Length and Off State Current for InAs/Si Heterojunction TFET Mayank Sachan, Wangkheirakpam Vandana Devi, Manisha Bharti International Conference on Signal Processing and Communication ICSC, 2025 this paper contains the Optimization and Comparative study of the Planar Architecture of InAs/Si Heterojunction TFETs. Optimizations performed on the Original Model such as Channel length is reduced to 45nm and Gate Metal overlapping is introduced. Doping concentrations are varied to optimize the electrical device parameter after modifying the physical dimensions of the original model. The Optimized model presented shows some significant improvements such as Reduced off state current (Ioff) while on state current (Ion) remains same and minimum Subthreshold swing slightly increased to 7.3mV/Dec. Ion by Ioff ratio is about 1010. Comparative study with Original Model and other parameters of the optimized model are presented further in the paper.
Hetero-Stacked Source Tunnel FET-Driven Biosensing Application with Enhanced Sensitivity Priyanshu Agrawal, Vandana Devi Wangkheirakpam, Dhandapani Vaithiyanathan 2024 4th International Conference on Advances in Electrical Computing Communication and Sustainable Technologies Icaect 2024, 2024 This paper studies the performance assessment of Hetero-Stacked Source Tunnel FET for greater responsiveness in biosensing application. The presence of Si stack over the Ge gives an improved drain current characteristic. This leads to the increase in the sensitivity up to the of 103. A comparative analysis of the TCAD simulated results of HS-TFET is made with conventional TFET based dual nanogap biosensor considering the measured sensitivity parameter. We can observe that sensitivity of HS-TFET Transistor Biosensor is of the order of 100 times that of sensitivity of C-TFET.
Optically Gated Vertical Tunnel FET for Near-Infrared Sensing Application Vandana Devi Wangkheirakpam, Brinda Bhowmick, Puspa Devi Pukhrambam, Ghanshyam Singh Nanoelectronics Devices Design Materials and Applications Part I, 2023 This chapter presents a vertical tunnel FET (VTFET) designed for light sensing application to use in medical diagnosis and treatment, tracking of targets, analysis of the chemical composition, surveillance cameras, etc. Various aspects related to this optimized VTFET photosensor are analyzed to benchmark its performance among those available in the literature. A brief discussion on the conventional TFET geometry is presented to give a better understanding of the advantages of its working methodologies. The concept of sensing using optically gated VTFET is studied with a remarkable focus on design perspective and detection principle. The modified TFET geometry has a photosensitive gate called an optically gated VTFET to use in near-infrared sensing applications. The design approach based on Synopsys Technology Computer-Aided Design (TCAD), along with suitable physics-based models of simulation, is introduced in this chapter. A wavelength range of 0.7µm to 1µm is considered in the simulation process. Analyses of different sensing parameters, such as sensitivity, responsivity, etc., at low intensity of illumination, are brought to light with the main focus on the viability of the proposed sensor to be a superior one. Through such analysis, this chapter presents a low-power, highly sensitive, cost-effective, faster response time photodetector that may be applicable for next-generation photosensors.