A. Ranjani Aruna (AntonyRaj Ranjani Aruna) received B.E degree in ECE from M.I.E.T institute of Engineering & Technology, Tiruchirappalli affiliated to Anna University, Tiruchirappalli, Tamil Nadu in 2011. M.E Degree in VLSI Design from KCG College of Engineering & Technology, Anna University, Chennai, Tamil Nadu in 2014. She is currently working as a Teaching Fellow toward the Ph.D. degree at the Department of Electronics and Communication Engineering, College of Engineering Guindy, Anna University, Chennai, India. Her research interests include low power VLSI, VLSI application in spintronics and nanotechnology.
RESEARCH INTERESTS
VLSI design, Analog circuit, Digital Electronics, Spintronics and Embedded system.
Design and optimization of a Bandgap Voltage Reference Circuit A Ranjani Aruna, H Tamil Selvan, J Kamala, C R S Hanuman Proceedings 2024 International Conference on Social and Sustainable Innovations in Technology and Engineering Sasi ITE 2024, 2024 The design and optimization of a Bandgap reference circuit, a critical component in the area of Analog and mixed-signal integrated circuits This research presents a comprehensive study on the design. Bandgap voltage references are essential for providing stable and temperature-independent voltage references, crucial for ensuring accurate and reliable operation of various electronic systems. The proposed design employs a combination of hybrid bipolar and Complementary Metal Oxide Semiconductor (CMOS) transistor technologies in order to provide a stable and temperature–compensated output voltage. The study investigates several circuit topologies and evaluates their performance using metrics like line regulation and temperature coefficient. The outcomes of the simulation demonstrate that the suggested structure works to achieve a low temperature coefficient. The optimized bandgap reference exhibits superior performance compared to existing designs, making it well-suited for applications demanding high precision and reliability, such as voltage regulators, analog-to-digital converters, and sensor interfaces.
Design of Optimized and Energy Efficient 1-bit Comparator Ranjani Aruna A, Kamala J, Sahaana K, Priya M International Conference on Smart Systems for Applications in Electrical Sciences Icsses 2023, 2023 New high frequency and low power devices are being created using the developing nanotechnology termed quantum-dot cellular automata (QCA). One of the most important and frequently used circuits is the comparator. Twelve quantum cells with a surface area of roughly 0.01 square micrometers are used in the proposed comparator. This structure provides a significant benefit over previous preceding comparators with reference to complexity, cell count, delay, and energy dissipation. The comparator's proposed design performed better the existing circuit design in terms of cost with a 50% decrease and energy with a 10% reduction. The QCA Designer-E tool is used to calculate the energy dissipation of this design.
1. Aruna, A. Ranjani, and M. Mohameed Yaseen. "DESIGN OF MEMS IJRECE 2, no. 1 (2014): 34-37.
2. Aruna, A. Ranjani, and J. Kamala. " Modified GDI Based Time to Digital Converter". INTERNATIONAL JOURNAL OF SYSTEMS APPLICATIONS, ENGINEERING & DEVELOPMENT, no. 11 (2017): 216 -219.
