T.S.ANANDHI

@annamalaiuniversity.ac.in

Professor in Electronics & Instrumentation Engineering
Annamalai University



              

https://researchid.co/ans.instrusgmail.com

EDUCATION

B.E (ELECTRONICS & INSTRUMENTATION)
M.E(PROCESS CONTROL & INSTRUMENTATION)
PH.D (POWER ELECTRONICS)

RESEARCH INTERESTS

power electronics
solar energy
Control system

25

Scopus Publications

206

Scholar Citations

7

Scholar h-index

5

Scholar i10-index

Scopus Publications



  • Modelling, Simulation, and Implementation of Effective Controller for KY Stepping Up Converter
    K. Ramash Kumar, T. S. Anandhi, B. Vijayakrishna, and S. Balakumar
    Hindawi Limited
    This paper studies on a new Hybrid Posicast Control (HPC) for Fundamental KY Boost Converter (FKYBC) worked in Continuous Current Mode (CCM). Posicast is a feed-forward compensator. It reduces the overshoot in the step result of the flippantly damped plant. But the conventional controller approach is sensitive owing to the changes in the natural frequency. So, as to reduce this undesirable sensitivity and load potential control of FKYBC, a HPC is designed in this article. Structure of HPC is posicast with feedback loop. The independent computational time delay is the main design function of the posicast. The enactment of the FKYBC with HPC is confirmed at various operating regions by making the MATLAB/Simulink and experimental model. The posicast function values are implemented in Arduino Uno-ATmega328P microcontroller. The results of new HPC have produced minimal noise in control signal in comparison with traditional PID control.

  • Modified Mechanical Structure Electric Bike Design Computation and Prototype Model Implementation
    K. Ramash Kumar, T. S. Anandhi, B. Vijayakrishna, Monalisa Mohanty, M. Siva Ramkumar, H. A. Shivappa, Belachew Zegale Tizazu, B. Kirubakaran, and E. Thinapakar
    Hindawi Limited
    The aim of this paper is to investigate the design computation and prototype model implementation of a Modified Mechanical Structure (MMS) Electric Bike (E-Bike). It is the technology that allows the vehicle to operate with the assistance of electrical energy. All conventional cars will be converted to electric vehicles (EVs) in the future. EVs will be affordable to all types of people, allowing them to fly comfortably and safely. As a result, this paper proposes a design estimate and model implementation of the MMS E-Bike with the smallest number of parts, lowest expense, and lightest weight possible. The most important parts of the designed MMS E-Bike are the battery, MMS, BLDC motor, and electronic commutator with their controller. Because of its adapted mechanical frame nature, the designed E-Bike is low in cost and weight, and it can also go up to 25 kmph. Furthermore, the rider will be able to ride the built MMS E-Bike without any pain to their bodies and should be able to sit comfortably during their journey. In comparison to the Ampere Angel and DMW Electra 20 E-Bikes, the performance of the developed model is tested under various operating conditions, as well as their battery backup.

  • A novel parallel duty cycle control algorithm for photovoltaic voltage regulator system using FPGA
    Joseph Anthony Prathap and T.S. Anandhi
    Elsevier BV
    Abstract In this paper, a novel parallel duty cycle control method is proposed to regulate the load voltage of the photo voltaic (PV) fed DC-DC buck converter. The proposed method concentrates on the control of PV fed DC-DC buck converter by fusing the two duty cycles from maximum power point tracking (MPPT) and digital proportional integral-digital pulse width modulation (DPI-DPWM) through the HDPWM algorithm. The fusion of the MPPT algorithms and DPI-DPWM algorithms achieve high precision in the voltage regulation of the PV fed DC-DC buck converter. The proposed parallel duty cycle control is passed through the HDPWM algorithm to compensate the high clocking frequency demand with the design resolution of 210 bits. Further, the design complexity of the HDPWM algorithm is reduced as the resolution of 210 bits is split as 25 and 25 bits for CDPWM and DDPWM respectively. The FPGA based implementation of the proposed parallel duty cycle method includes the synthesizable VHDL code for i) MPPT algorithms, ii) DPI-based DPWM algorithms, iii) Fusing of the MPPT-DPI-DPWM and iv) Passing the fused MPPT-DPI-DPWM through the HDPWM algorithm. The Xilinx Spartan 3A DSP, FPGA implementation is suitable for the proposed parallel duty cycle control method. The hardware results validate the satisfactory PV voltage regulation under continuous changing weather conditions. The transient response of INC-DPI-HDPWM seems to have a faster settling time compared to other MPPT-DPI-DPWM methods. Also, its FPGA implementation proves less area in design and low power consumption compared to the existing methods.

  • Performance evaluation and analysis of 64-quadrature amplitude modulator using Xilinx Spartan FPGA


  • Investigation of FPGA based 32-bit RISC-modulation processor


  • Xilinx Spartan 3A DSP FPGA based DC Voltage Regulators for PV Systems
    Joseph Anthony Prathap, T.S. Anandhi, and T.S. Sivakumaran
    Elsevier BV


  • Real time implementation of variable step size based P&O MPPT for PV systems based on dSPACE
    K. Muthukumar and T.S. Anandhi
    Institute of Advanced Engineering and Science
    Nowadays Solar energy is an important energy source due to the energy crisis and environment pollution. Maximum power point tracking (MPPT) algorithm improves the utilization efficiency of a photovoltaic systems. In this paper an improved P&O MPPT algorithm is developed and simulated using MATLAB / SIMULINK to control the DC/DC buck converter. The obtained simulink model is also verified using dspace tool. Both the simulated and experimental results are validated by also comparing them with conventional MPPT methods. The performance measures show the increase in the efficiency of PV system by the proposed model.

  • Performance evaluation of 3Φ asymmetrical MLI with reduced switch count
    Chinnapettai Ramalingam Balamurugan, S.P. Natarajan, and T.S. Anandhi
    Institute of Advanced Engineering and Science
    The multi level inverter system is habitually exploited in AC drives, when both reduced harmonic contents and high power are required. In this paper, a new topology for three phase asymmetrical multilevel inverter employing reduced number of switches is introduced. With less number of switches, the cost, space and weight of the circuit are automatically reduced. This paper discusses the new topology, the switching strategies and the operational principles of the chosen inverter. Simulation is carried out using MATLAB-SIMULINK. Various conventional PWM techniques that are appropriate to the chosen circuit such as PDPWM, PODPWM, APODPWM, VFPWM and COPWM are employed in this work. COPWM technique affords the less THD value and also affords a higher fundamental RMS output voltage.

  • Hardware implementation of cascaded hybrid MLI with reduced switch count
    Chinnapettai Ramalingam Balamurugan, S.P. Natarajan, T.S. Anandhi, and R. Bensaraj
    Institute of Advanced Engineering and Science
    <p class="JESTECAbstract">This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF)<strong> </strong>PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.</p>

  • Real time implementation of FPGA based digital PWM for 81-level multilevel inverter
    Joseph Anthony Prathap, T. S. Anandhi, and T. S. Sivakumaran
    IEEE

  • Real-Time implementation of Three Phase 27-Level multilevel inverter with DC carrier PWM technique
    B. Kunjithapatham, T.S. Anandhi, and J. Arputha Vijaya Selvi
    IEEE
    Nowadays the asymmetrical cascaded Multi-Level Inverter (MLI) concepts are predominantly investigated. This paper deals with the multi constant dc carrier modulation strategy for 3Φ 27 level Trinary Hybrid MLI (THMLI). The suitability and qualities of the modulation strategy is investigated by simulation using MATLAB/Simulink and also implemented in real time using dSPACE real time interface controller. The proposed task focuses on the reduction of harmonics content in output phase voltages and line voltages of the 3Φ THMLI. The viability of the multi constant dc carrier technique on the MLI has also been presented.

  • Implementation of FPGA based DPWM-digital PI closed loop controller for voltage regulation
    Prathap Joseph Anthony, T. S. Anandhi, and T. S. Sivakumaran
    Indian Society for Education and Environment
    Objectives: In this paper, a Field Programmable Gate Array (FPGA) based real time implementation of a closed loop controller for regulating the load voltage under line and load disturbances by generating Digital Pulse Width Modulation (DPWM) is developed. Digital Proportional Integral (DPI) controller is designed to generate the DPWM. Methods: DPWM are developed by two methods: Counter based and Delay line based. The closed loop DPWM activated DC-DC buck converter is simulated using MODELSIM and tested in real time using Xilinx Spartan 3A DSP FPGA. Findings: Hardware results show the regulated load voltage by updating the DPWM control signal duty cycle to compensate the line and load disturbances. FPGA based DPWM provides less complexity in design. Improvements: Hybrid based DPWM method with closed loop control for DC-DC Buck converter could be used for voltage regulation.

  • Hardware implementation of multi-phase power conversion using matrix converter


  • Implementation of variable step based incremental conductance MPPT algorithm using dSPACE


  • Simulation and dSPACE based implementation of various PWM strategies for a new H-type FCMLI topology
    Chinnapettai Ramalingam Balamurugan, S.P. Natarajan, T.S. Anandhi, and B. Shanthi
    Institute of Advanced Engineering and Science
    <p>Depending on the number of levels in output voltage, inverters can be divided into two categories: two level inverter and Multi Level Inverters (MLIs). An inverter topology for high voltage and high power applications that seems to be gaining interest is the MLI. In high power and high voltage applications, the two level inverters have some limitations in operating at high frequency mainly due to switching losses and constraints of device rating.In this paper, a three phase H + type FCMLI (Flying Capacitor MLI) using sinusoidal reference, third harmonic injection reference, 60 degree reference and stepped wave reference are initially developed using SIMULINK and then implemented in real time environment using dSPACE. In H-type FCMLI with R-load it is inferred that bipolar COPWM-C provides output with relatively low distortion for 60 degree reference and bipolar COPWM-C strategy is found to perform better since it provides relatively higher fundamental RMS output voltage for THI reference. The five level output voltages of the chosen MLIs obtained using the MATLAB and dSPACE based PWM (Pulse Width Modulation) strategies and the corresponding %THD (Total Harmonic Distortion), V<sub>RMS</sub> (fundamental), CF (Crest Factor) and FF (Form Factor) are presented and analyzed.</p>

  • A design and implementation of hybrid controller for 3 phase to 3 phase power conversion using matrix converter


  • 81 levels trinary hybrid cascaded multilevel inverter
    K. Muthukumar, T. S. Anandhi, and S. P. Natarajan
    Praise Worthy Prize
    Multilevel inverters are increasingly used in medium and high power applications owing to advantages such as modularity, low power dissipation on switching devices and reduced harmonic distortion at the output of the inverter. The MLI structure used in this paper incorporates four H-bridges cascaded together with trinary mode of selection of dc power supply that facilitates 81 levels of output voltage. The designed 81 level Trinary Hybrid Cascaded Multilevel Inverter (THCMLI) uses bipolar multi-carrier pulse width modulation strategy. The performance quality in terms of THD, crest factor, form factor, and power distortion factor are evaluated for different modulation indices. From simulated results it is observed that the THD of the 81level is reduced satisfactorily in POD PWM and power distortion is reduced in PD PWM strategy and high RMS value of output voltage is achieved in APOD PWM strategy when compared with other strategies with FAFF and FAVF for THCMLI. Increased number of voltage levels upto 81 levels in the output waveform is obtained shows the improved quality and nearness to sinewave with sixteen switches.

  • Real time implementation of multi carrier based PWM techniques for single phase nine level trinary source CMLI using dSPACE


  • Performance evaluation of real time implementation of new hybrid PWM strategies for single phase seven level asymmetrical inverter


  • Improved method to mitigate the effect of coal fuel switching on critical process parameters of a steam generator in a thermal power plant
    S Dharmalingam, L Sivakumar, T Anandhi, and M Umapathy
    SAGE Publications
    The design and performance of steam generators supplied to thermal power plants are greatly influenced by the properties of coal burnt. All coals are not same and the variation of heating value of coal supplied to boiler results in changes in critical process parameters like pressure and temperature of main steam produced. These fluctuations are normally controlled by master pressure controller, provided the variation in heating value is within certain limits. If the heating value of coal being burnt varies substantially, a remedial measure is necessary to control the pressure and temperature fluctuations during coal fuel switching. The composition of the coal burnt currently in a boiler is determined from an online analyser, and an embedded controller computes the current heating value of the coal and suitably modifies the gains of all the controllers to arrest the undue fluctuations in pressure and temperature. A validated mathematical model for a typical 500 MW plant is used to simulate the variations in pressure and temperature of steam with normal and embedded controllers. Significant reduction in pressure and temperature variation has been achieved with an embedded controller. This article discusses the improved method of ensuring optimum boiler performance during coal fuel switchover.

  • Circuit level comparison of single- phase five- level inverters


  • UC3907 ASIC and TMS320F2407A DSP based control of paralleled buck DC-DC converters
    T.S. Anandhi, S.P. Natarajan, and T. Anitha
    IEEE
    UC3907 ASIC and TMS320F2407A DSP based control of paralleled buck DC-DC converters are developed and presented in this work to maintain a regulated output voltage under variations in the line and load and to control the output current of each converter so that they share the load current equally. Automatic master slave method is implemented in the present work. UC3907 load share controller and TMS320F2407A DSP based fuzzy logic controller perform linear regulation with satisfactory load current sharing.

RECENT SCHOLAR PUBLICATIONS

  • A Novel Fusion Switching Pattern Generation Algorithm for “N-Level” Switching Angle Algorithm Based Trinary Cascaded Hybrid Multi-Level Inverter
    JA Prathap, TS Anandhi
    Power Converters, Drives and Controls for Sustainable Operations, 203 2023

  • Field programmable gate array-based new fusion control for photovoltaic inverter
    JA Prathap, TS Anandhi
    Computers & Electrical Engineering 98, 107738 2022

  • Modelling, simulation, and implementation of effective controller for KY stepping up converter
    KR Kumar, TS Anandhi, B Vijayakrishna, S Balakumar
    Modelling and Simulation in Engineering 2022 (1), 8495432 2022

  • Research Article Modified Mechanical Structure Electric Bike Design Computation and Prototype Model Implementation
    KR Kumar, TS Anandhi, B Vijayakrishna, M Mohanty, MS Ramkumar, ...
     2021

  • [Retracted] Modified Mechanical Structure Electric Bike Design Computation and Prototype Model Implementation
    K Ramash Kumar, TS Anandhi, B Vijayakrishna, M Mohanty, ...
    Advances in materials science and engineering 2021 (1), 3673172 2021

  • A novel parallel duty cycle control algorithm for photovoltaic voltage regulator system using FPGA
    JA Prathap, TS Anandhi
    Microprocessors and Microsystems 65, 107-120 2019

  • Performance evaluation and analysis of 64-quadrature amplitude modulator using Xilinx Spartan FPGA
    JA Prathap, TS Anandhi, KR Kumar, B Srikanth
    International Journal of Engineering & Technology 7 (2.8), 570-577 2018

  • Investigation of FPGA based 32-bit RISC-Modulation Processor
    JA Prathap, TS Anandhi, N Malladhi, V Roja
    International Journal of Computer Information Systems and Industrial 2018

  • Xilinx spartan 3A DSP FPGA based DC voltage regulators for PV systems
    JA Prathap, TS Anandhi, TS Sivakumaran
    Materials Today: Proceedings 5 (1), 1348-1358 2018

  • Secure Video Compression and Integration Technique for Data Transmission
    ADS Kumar, R Muthu
    International Journal of Computer Network and Information Security 10 (11), 63 2017

  • Simulation and Real Time Implementation of Various PWM Strategies for 3 Φ Multilevel Inverter Using FPGA
    CR Balamurugan, SP Natarajan, TS Anandhi, B Shanthi
    International Journal of Reconfigurable and Embedded Systems 6 (1), 1 2017

  • Analysis of Pixel Merging for Multi Image Integration for Security Enhancement
    A Kumar, T Anandhi, R Muthu
    International Journal of Computer Applications 179 (4), 6-11 2017

  • FPGA Based Hybrid Digital PWM for DC-DC Voltage Regulator
    JA Prathap, TS Anandhi
     2017

  • Multi image integration and encryption algorithm for security applications
    ADS Kumar, TS Anandhi
    IECON 2016-42nd Annual Conference of the IEEE Industrial Electronics Society 2016

  • Implementation of FPGA based DPWM-Digital PI closed loop controller for voltage regulation
    JA Prathap, TS Anandhi, TS Sivakumaran
    Indian Journal of Science and Technology 9 (38), 1-9 2016

  • Real time implementation of variable step size based P&O MPPT for PV systems based on dSPACE
    K Muthukumar, TS Anandhi
    International Journal of Power Electronics and Drive Systems 7 (3), 915 2016

  • Real time implementation of FPGA based digital PWM for 81-level multilevel inverter
    JA Prathap, TS Anandhi, TS Sivakumaran
    2016 International Conference on Inventive Computation Technologies (ICICT 2016

  • Real-time implementation of three phase 27-level multilevel inverter with DC carrier PWM technique
    B Kunjithapatham, TS Anandhi, JAV Selvi
    2016 International Conference on Inventive Computation Technologies (ICICT 2016

  • Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches
    CR Balamurugan, SP Natarajan, TS Anandhi, R Bensaraj
    Indonesian Journal of Electrical Engineering and Computer Science 3 (2) 2016

  • Performance Evaluation of 3Φ Asymmetrical MLI with Reduced Switch Count
    CR Balamurugan, SP Natarajan, TS Anandhi
    Indonesian Journal of Electrical Engineering and Computer Science 2 (3), 671-680 2016

MOST CITED SCHOLAR PUBLICATIONS

  • Real time implementation of DSP based Fuzzy logic controller for Speed control of BLDC motor
    G Sakthivel, TS Anandhi, SP Natarjan
    International Journal of Computer Applications 10 (8), 22-28 2010
    Citations: 33

  • Design of fuzzy logic controller for a spherical tank system and its real time implementation
    G Sakthivel, TS Anandhi, SP Natarajan
    International journal of engineering research and applications 1 (3), 934-940 2011
    Citations: 25

  • Real time implementation of a fuzzy logic controller on FPGA using VHDL for DC motor speed control
    G Sakthivel, TS Anandhi, S Natarajan
    International Journal of Engineering Science and Technology 2 (9), 4511-4519 2010
    Citations: 20

  • Control of input series output parallel connected DC-DC converters
    SP Natarajan, TS Anandhi
    Journal of Power Electronics 7 (3), 265-270 2007
    Citations: 14

  • Modelling and real time implementation of digital PI controller for a non linear process
    G Sakthivel, TS Anandhi, SP Natarajan
    Journal of Innovative Research in Engineering and Sciences 2 (5), 274-290 2011
    Citations: 13

  • Multi image integration and encryption algorithm for security applications
    ADS Kumar, TS Anandhi
    IECON 2016-42nd Annual Conference of the IEEE Industrial Electronics Society 2016
    Citations: 7

  • Simulation and dSPACE based implementation of various PWM strategies for a new H-type FCMLI topology
    CR Balamurugan, SP Natarajan, B Shanthi, TS Anandhi
    International Journal of Power Electronics and Drive System 6 (3), 615-624 2015
    Citations: 7

  • [Retracted] Modified Mechanical Structure Electric Bike Design Computation and Prototype Model Implementation
    K Ramash Kumar, TS Anandhi, B Vijayakrishna, M Mohanty, ...
    Advances in materials science and engineering 2021 (1), 3673172 2021
    Citations: 6

  • Xilinx spartan 3A DSP FPGA based DC voltage regulators for PV systems
    JA Prathap, TS Anandhi, TS Sivakumaran
    Materials Today: Proceedings 5 (1), 1348-1358 2018
    Citations: 6

  • A novel parallel duty cycle control algorithm for photovoltaic voltage regulator system using FPGA
    JA Prathap, TS Anandhi
    Microprocessors and Microsystems 65, 107-120 2019
    Citations: 5

  • Variable step size based MPPT for photovoltaic system
    K Muthukumar, TS Anandhi
    Middle-East Journal of Scientific Research 24 (4), 1159-1168 2016
    Citations: 5

  • Single phase Symmetrical Multilevel inverter design for various loads
    CR Balamurugan, SP Natarajan, TS Anandhi
    Electrical and Electronics Engineering: An International Journal 5 (2), 25-35 2016
    Citations: 5

  • Design of optimized fuzzy logic controller for area minimization and its FPGA implementation
    G Sakthivel, TS Anandhi, SP Natarajan
    International Journal of Computer Science and Network Security 10 (8), 187-192 2010
    Citations: 5

  • Field programmable gate array-based new fusion control for photovoltaic inverter
    JA Prathap, TS Anandhi
    Computers & Electrical Engineering 98, 107738 2022
    Citations: 4

  • Modelling, simulation, and implementation of effective controller for KY stepping up converter
    KR Kumar, TS Anandhi, B Vijayakrishna, S Balakumar
    Modelling and Simulation in Engineering 2022 (1), 8495432 2022
    Citations: 4

  • Real time implementation of variable step size based P&O MPPT for PV systems based on dSPACE
    K Muthukumar, TS Anandhi
    International Journal of Power Electronics and Drive Systems 7 (3), 915 2016
    Citations: 4

  • Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches
    CR Balamurugan, SP Natarajan, TS Anandhi, R Bensaraj
    Indonesian Journal of Electrical Engineering and Computer Science 3 (2) 2016
    Citations: 4

  • Modeling and implementation of closed loop PI controller for 3 phase to 3 phase power conversion using matrix converter
    B Muthuvel, TS Anandhi, P Sivagnanam, M Jananiraj
    IOSR Journal of Electrical and Electronics Engineering 11 (1), 01-08 2016
    Citations: 4

  • UC3907 ASIC and TMS320F2407A DSP based control of paralleled Buck DC-DC converters
    TS Anandhi, SP Natarajan, T Anitha
    2005 Annual IEEE India Conference-Indicon, 472-475 2005
    Citations: 4

  • Circuit level comparison of single-phase five-level inverters
    TS Anandhi, SP Natarajan, SS Kumar, R Vijayarajeswaran
    2005 International Conference on Power Electronics and Drives Systems 1, 799-804 2005
    Citations: 4