Geancarlo Abich

@inesc-id.pt

Postdoctorate
INESC-ID

Geancarlo Abich


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https://researchid.co/geancarlo.abich

RESEARCH, TEACHING, or OTHER INTERESTS

Hardware and Architecture, Artificial Intelligence, Computer Engineering, Signal Processing

FUTURE PROJECTS

Exploring AI-based applications for Aerospace Environment

This project aims to study applications aimed at the environment of space stations, satellites, and spacecraft that enable crew members or autonomous systems to make accurate decisions throughout a mission based on real-time data acquisition.


Applications Invited
Master Students PhD Students

Radiation Hardening Solutions

This project aims to investigate and propose solutions that enable the use of hardware and software projects in an environment with hostile radiation, ie, space environments.


Applications Invited
Master Students PhD Students

AI-Acceleration MPSoCs and ISAs

This project aims to investigate and propose hardware (ISA) and software (compiler) solutions to improve the performance of Machine Learning applications based on neural networks. This implies both the development of architectural changes to the development of architecture-specific specialized libraries.


Applications Invited
Master Students PhD Students
20

Scopus Publications

180

Scholar Citations

8

Scholar h-index

7

Scholar i10-index

Scopus Publications

  • Guest Editorial TCAS-I Special Issue Guest Editorial Based on the 16th IEEE Latin American Symposium on Circuits and Systems
    Geancarlo Abich, Xinmiao Zhang
    IEEE Transactions on Circuits and Systems I Regular Papers, 2026
  • Assessing Soft Error Reliability in Vectorized Kernels: Vulnerability and Performance Trade-Offs on Arm and RISC-V ISAs
    Geancarlo Abich
    Proceedings Design Automation and Test in Europe Date, 2025
    The demand for advanced processing capabilities is paramount in the ever-evolving landscape of radiation-resilient computing exploration. With the standardization of vector extensions on Arm and Risc-V ISAs, leading technology companies are adopting high-performance processors to exploit vector capabilities. This work promotes uniform random fault injection techniques to assess the increased vulnerability within the adoption of vector extensions from RISC-V RVV and Arm SVE. The obtained results show the soft error criticality correlation to registers' cross-section and the vectorized benchmarks, emphasizing the necessity of performance and reliability balance in emerging devices with vector capabilities.
  • Early Soft Error Reliability Assessment of Convolutional Neural Networks Executing on Resource-constrained IoT Edge Devices
    Geancarlo Abich, Ricardo Reis, Luciano Ost
    Proceedings International Test Conference, 2024
    Machine learning (ML) algorithms offer solutions across diverse domains, including resource-constrained devices. Despite advances in performance optimization and reduced-precision implementations, ML susceptibility to soft errors from radiation remains unclear. This work uses virtual platforms (VPs) to conduct a comprehensive soft error reliability assessment, at early design phases, of ML algorithms for Arm processors. The test strategy integrates confidence metrics, extensive fault injection (FI) campaigns, application profiling, and fault classifications. The main goals comprise (i) analyzing the consistency of SOFIA, a JIT-based framework, against event-driven simulators (mean mismatch ±4%, worst-case ±8%) and (ii) investigating correlations between FI results, NN-optimized kernels, and reduced-precision CNNs for IoT devices (up to 60% critical faults), aiming to promote software-based mitigation techniques (up to 98% critical faults mitigated). Results covering over 14.8 million FIs highlight SOFIA’s consistency, offering insights into balancing performance and reliability in multithreaded IoT edge platforms.
  • A Performance Analysis of a Real-time Jet Engine Performance Calculator Executing in Arm Cortex-A Multicore Processors
    Jose Eduardo Thums, Areeb Sherjil, Germano Girondi, Antonio Junior, Jonas Gava, et al.
    Proceedings of the IEEE International Conference on Electronics Circuits and Systems, 2024
    The performance of multicore processors plays a crucial role in meeting the safety standards requirements (e.g., response time) for safety-critical edge devices, affecting aspects such as resource allocation, fault tolerance, management, and real-time processing. In this regard, benchmarks are needed to assess the performance and underlying real-time aspects. This work contributes by extending a multithreaded real-time Jet Engine benchmark, which provides better performance and fewer missed deadlines w.r.t. other parallel solutions. The paper presents a detailed performance analysis considering different Jet Engine benchmark parallel models executed in four Arm Cortex-A processors. Results show an average performance improvement of 3.83% to 66.01% when compared to the original parallel models executing in the Cortex A-76 processor. Results also show that the extended version using a 32-bit SIMD floating-point technology has eliminated all missed deadlines when executed in the Arm Cortex-A53, A72, and A76.
  • A Lightweight Mitigation Technique for Resource- Constrained Devices Executing DNN Inference Models Under Neutron Radiation
    Jonas Gava, Alex Hanneman, Geancarlo Abich, Rafael Garibotti, Sergio Cuenca-Asensi, et al.
    IEEE Transactions on Nuclear Science, 2023
  • Early soft error reliability assessment of convolutional neural networks executing on resource-constrained iot edge devices
    Geancarlo Abich, Luciano Ost, Ricardo Reis
    Synthesis Lectures on Engineering Science and Technology, 2023
  • Power and Performance Costs of Radiation-Hardened ML Inference Models Running on Edge Devices
    Geancarlo Abich, Anderson Ignacio Silva, Jonas Gava, Altamiro Amadeu Susin, Ricardo Reis, et al.
    Proceedings 36th Sbc Sbmicro IEEE ACM Symposium on Integrated Circuits and Systems Design Sbcci 2023, 2023
    Integrating Machine Learning (ML) inference models into edge computing devices has introduced several challenges related to improving power efficiency, performance, and reliability. As the susceptibility of these models to radiation-induced soft errors is a significant concern, applying lightweight mitigation techniques is key, mostly due to power and memory constraints inherent to edge devices. In this regard, assessing the potential power and performance penalties associated with deploying soft error mitigation techniques on customized ML inference models running in such resource-constrained devices is crucial. This paper, therefore, investigates the performance and power consumption implications of applying software-based mitigation techniques on ML inference models optimized for edge devices. The experiments demonstrate that implementing RAT technique reduced up to 3.2 x the susceptibility to the occurrence of soft errors caused by radiation with low performance and power consumption costs w.r.t. a P-TMR technique.
  • Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices
    Geancarlo Abich, Anderson Ignacio da Silva, José Eduardo Thums, Rafael da Silva, Altamiro Amadeu Susin, et al.
    Proceedings of IEEE Computer Society Annual Symposium on VLSI Isvlsi, 2023
    Incorporating Machine Learning (ML) inference models into edge computing devices has presented some performance and reliability enhancement challenges. Multi-threaded ML models demonstrated power efficiency and performance gains when deployed on high-performance multicore platforms, including powerful general-purpose processors and graphics processing units (GPUs). However, there is a relative lack of investigation on the potential impact of parallel pre-trained ML models when executed in resource-constrained edge devices, which rely on low energy and reduced memory footprint processors. With that in mind, this work presents the impact of multi-threaded parallelism on the performance, power consumption, and soft error reliability of different ML inference models. Results show that parallel models enhanced by up to 2.6$\\times$ the performance per watt while reducing their susceptibility to the occurrence of radiation-induced soft errors in up to 6.6$\\times$ w.r.t. the original sequential versions.
  • The Impact of Soft Errors in Memory Units of Edge Devices Executing Convolutional Neural Networks
    Geancarlo Abich, Rafael Garibotti, Ricardo Reis, Luciano Ost
    IEEE Transactions on Circuits and Systems II Express Briefs, 2022
    Driven by the success of machine learning algorithms for recognizing and identifying objects, there are significant efforts to exploit convolutional neural networks (CNNs) in edge devices. The growing adoption of CNNs in safety-critical embedded systems (e.g., autonomous vehicles) increases the demand for safe and reliable models. In this sense, this brief investigates the soft error reliability of two CNN inference models considering single event upsets (SEUs) occurring in register files, RAM, and Flash memory sections. The results show that the incidence of SEUs in flash memory sections tend to lead to more critical faults than those resulting from the occurrence of bit-flips in RAM sections and register files.
  • Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks
    Geancarlo Abich, Rafael Garibotti, Jonas Gava, Ricardo Reis, Luciano Ost
    2022 IEEE 13th Latin American Symposium on Circuits and Systems Lascas 2022, 2022
    Convolution neural networks (CNNs) have been incorporated into resource-constrained edge devices to intelligently manage and process local data coming from a variety of sensors. Thread parallelism has been used to boost the performance of neural networks, but only few works address the effect of these parallel modifications on the soft error reliability of underlying models running on edge devices. In this sense, this work aims to assess the soft error reliability of a multi-threaded version of a CNN model developed based on the Arm CMSIS-NN kernels. Results show that the developed threaded CNN model increases performance at the cost of low memory footprint overhead. Promoted multi-threaded CNN model also provides better soft error reliability w.r.t. the original sequential version.
  • Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks
    Geancarlo Abich, Jonas Gava, Rafael Garibotti, Ricardo Reis, Luciano Ost
    IEEE Transactions on Circuits and Systems I Regular Papers, 2021
  • Evaluation of the soft error assessment consistency of a JIT-based virtual platform simulator
    Geancarlo Abich, Rafael Garibotti, Vitor Bandeira, Felipe da Rosa, Jonas Gava, et al.
    Iet Computers and Digital Techniques, 2021
  • The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network
    Geancarlo Abich, Ricardo Reis, Luciano Ost
    2021 IEEE 12th Latin American Symposium on Circuits and Systems Lascas 2021, 2021
  • Soft error reliability assessment of neural networks on resource-constrained IoT devices
    Geancarlo Abich, Jonas Gava, Ricardo Reis, Luciano Ost
    Icecs 2020 27th IEEE International Conference on Electronics Circuits and Systems Proceedings, 2020
  • A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip
    Jean Carlo Hamerski, Geancarlo Abich, Ricardo Reis, Luciano Ost, Alexandre Amory
    31st Symposium on Integrated Circuits and Systems Design Sbcci 2018, 2018
  • Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems
    Felipe T. Bortolon, Geancarlo Abich, Sergio Bampi, Ricardo Reis, Fernando Moraes, et al.
    Proceedings IEEE International Symposium on Circuits and Systems, 2018
  • Publish-subscribe programming for a NoC-based multiprocessor system-on-chip
    Jean Carlo Hamerski, Geancarlo Abich, Ricardo Reis, Luciano Ost, Alexandre Amory
    Proceedings IEEE International Symposium on Circuits and Systems, 2017
  • Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems
    G. Abich, M. G. Mandelli, F. R. Rosa, F. Moraes, L. Ost, et al.
    2016 IEEE International Conference on Electronics Circuits and Systems Icecs 2016, 2016
  • Ueber das magnetische Eisenoxyd in Mineralien
    G. Abich
    Annalen Der Pharmacie, 1836
  • Ueber die Aufschliessung thonerdehaltiger und anderer schwer zersetzbarer Fossilien
    G. Abich
    Annalen Der Pharmacie, 1836

RECENT SCHOLAR PUBLICATIONS

  • Guest Editorial TCAS-I Special Issue Guest Editorial Based on the 16th IEEE Latin American Symposium on Circuits and Systems
    G Abich, X Zhang
    IEEE Transactions on Circuits and Systems I: Regular Papers 73 (3), 1526-1527 , 2026
    2026
  • NSREC 2024 Special Issue of the IEEE TRANSACTIONS ON NUCLEAR SCIENCE
    G Abich, A Akturk, A Alessi, K Arnold, L Artola, M Aubry, R Austin, ...
    IEEE Transactions on Nuclear Science 72 (4) , 2025
    2025
  • Assessing Soft Error Reliability in Vectorized Kernels: Vulnerability and Performance Trade-Offs on Arm and RISC-V ISAs
    G Abich
    2025 Design, Automation & Test in Europe Conference (DATE), 1-2 , 2025
    2025
  • A Performance Analysis of a Real-time Jet Engine Performance Calculator Executing in Arm Cortex-A Multicore Processors
    JE Thums, A Sherjil, G Girondi, A Junior, J Gava, G Abich, R Reis, L Ost
    2024 31st IEEE International Conference on Electronics, Circuits and Systems … , 2024
    2024
    Citations: 1
  • Early soft error reliability assessment of convolutional neural networks executing on resource-constrained IoT edge devices
    G Abich, R Reis, L Ost
    2024 IEEE International Test Conference (ITC), 207-216 , 2024
    2024
    Citations: 1
  • Power and Performance Costs of Radiation-hardened ML Inference Models Running on Edge Devices
    G Abich, AI Silva, J Gava, AA Susin, R Reis, L Ost
    2023 36th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6 , 2023
    2023
  • Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices
    G Abich, AI Silva, JE Thums, R Silva, AA Susin, R Reis, L Ost
    IEEE Computer Society Annual Symposium on VLSI 2023 (ISVLSI), 1-6 , 2023
    2023
    Citations: 2
  • A lightweight mitigation technique for resource-constrained devices executing DNN inference models under neutron radiation
    J Gava, A Hanneman, G Abich, R Garibotti, S Cuenca-Asensi, RP Bastos, ...
    IEEE Transactions on Nuclear Science 70 (8), 1625-1633 , 2023
    2023
    Citations: 20
  • Soft Error Assessment Methodology
    G Abich, L Ost, R Reis
    Early Soft Error Reliability Assessment of Convolutional Neural Networks … , 2023
    2023
  • Background in ML Models and Radiation Effects
    G Abich, L Ost, R Reis
    Early Soft Error Reliability Assessment of Convolutional Neural Networks … , 2023
    2023
  • Soft Error Reliability Assessment of ML Inference Models Executing on Resource-Constrained IoT Edge Devices
    G Abich, L Ost, R Reis
    Early Soft Error Reliability Assessment of Convolutional Neural Networks … , 2023
    2023
  • Early Soft Error Consistency Assessment
    G Abich, L Ost, R Reis
    Early Soft Error Reliability Assessment of Convolutional Neural Networks … , 2023
    2023
  • 2022 Index IEEE Transactions on Circuits and Systems II: Express Briefs Vol. 69
    Z Abbas, J Abdekhoda, S Abdelfattah, D Abdelrahman, B Abdollahi, ...
    IEEE Transactions on Circuits and Systems II: Express Briefs 69 (12) , 2022
    2022
  • A Lightweight Mitigation Technique for Resource-constrained Devices under Neutron Radiation
    J Gava, G Abich, R Garibotti, S Cuenca-Asensi, RP Bastos, R Reis, L Ost
    Conference on Radiation Effects on Components and Systems (RADECS 2022) , 2022
    2022
    Citations: 2
  • Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks
    G Abich, R Garibotti, J Gava, R Reis, L Ost
    2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS) 1 (1 … , 2022
    2022
    Citations: 12
  • The Impact of Soft Errors in Memory Units of Edge Devices Executing Convolutional Neural Networks
    G Abich, R Garibotti, R Reis, L Ost
    IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 679-683 , 2022
    2022
    Citations: 24
  • The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network
    G Abich, R Reis, L Ost
    2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 1-4 , 2022
    2022
    Citations: 9
  • Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks
    G Abich, J Gava, R Garibotti, R Reis, L Ost
    IEEE Transactions on Circuits and Systems I: Regular Papers , 2021
    2021
    Citations: 43
  • Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator
    G Abich, R Garibotti, V Bandeira, F da Rosa, J Gava, F Bortolon, ...
    IET Computers & Digital Techniques 15 (2), 125-142 , 2021
    2021
    Citations: 17
  • 2021 Index IEEE Transactions on Circuits and Systems I: Regular Papers Vol. 68
    M Abedin, G Abich, AA Abidi, AS Abraham, J Acharya, JM Acken, ...
    IEEE Transactions on Circuits and Systems I: Regular Papers 68 (12) , 2021
    2021

MOST CITED SCHOLAR PUBLICATIONS

  • Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks
    G Abich, J Gava, R Garibotti, R Reis, L Ost
    IEEE Transactions on Circuits and Systems I: Regular Papers , 2021
    2021
    Citations: 43
  • The Impact of Soft Errors in Memory Units of Edge Devices Executing Convolutional Neural Networks
    G Abich, R Garibotti, R Reis, L Ost
    IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 679-683 , 2022
    2022
    Citations: 24
  • Soft error reliability assessment of neural networks on resource-constrained IoT devices
    G Abich, J Gava, R Reis, L Ost
    2020 27th IEEE International Conference on Electronics, Circuits and Systems … , 2020
    2020
    Citations: 22
  • A lightweight mitigation technique for resource-constrained devices executing DNN inference models under neutron radiation
    J Gava, A Hanneman, G Abich, R Garibotti, S Cuenca-Asensi, RP Bastos, ...
    IEEE Transactions on Nuclear Science 70 (8), 1625-1633 , 2023
    2023
    Citations: 20
  • Evaluation of the soft error assessment consistency of a JIT‐based virtual platform simulator
    G Abich, R Garibotti, V Bandeira, F da Rosa, J Gava, F Bortolon, ...
    IET Computers & Digital Techniques 15 (2), 125-142 , 2021
    2021
    Citations: 17
  • Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks
    G Abich, R Garibotti, J Gava, R Reis, L Ost
    2022 IEEE 13th Latin America Symposium on Circuits and System (LASCAS) 1 (1 … , 2022
    2022
    Citations: 12
  • Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems.
    G Abich, MG Mandelli, FR da Rosa, F Moraes, L Ost, R Reis
    IEEE International Conference on Electronics, Circuits and Systems (ICECS … , 2016
    2016
    Citations: 12
  • The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network
    G Abich, R Reis, L Ost
    2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS), 1-4 , 2022
    2022
    Citations: 9
  • Publish-subscribe programming for a NoC-based multiprocessor system-on-chip
    JC Hamerski, G Abich, R Reis, L Ost, A Amory
    2017 IEEE International Symposium on Circuits and Systems (ISCAS) , 2017
    2017
    Citations: 8
  • Exploring the impact of soft errors on NoC-based multiprocessor systems
    FT Bortolon, G Abich, S Bampi, R Reis, F Moraes, L Ost
    2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5 , 2018
    2018
    Citations: 5
  • Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices
    G Abich, AI Silva, JE Thums, R Silva, AA Susin, R Reis, L Ost
    IEEE Computer Society Annual Symposium on VLSI 2023 (ISVLSI), 1-6 , 2023
    2023
    Citations: 2
  • A Lightweight Mitigation Technique for Resource-constrained Devices under Neutron Radiation
    J Gava, G Abich, R Garibotti, S Cuenca-Asensi, RP Bastos, R Reis, L Ost
    Conference on Radiation Effects on Components and Systems (RADECS 2022) , 2022
    2022
    Citations: 2
  • A design patterns-based middleware for multiprocessor systems-on-chip
    JC Hamerski, G Abich, R Reis, L Ost, A Amory
    2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6 , 2018
    2018
    Citations: 2
  • A Performance Analysis of a Real-time Jet Engine Performance Calculator Executing in Arm Cortex-A Multicore Processors
    JE Thums, A Sherjil, G Girondi, A Junior, J Gava, G Abich, R Reis, L Ost
    2024 31st IEEE International Conference on Electronics, Circuits and Systems … , 2024
    2024
    Citations: 1
  • Early soft error reliability assessment of convolutional neural networks executing on resource-constrained IoT edge devices
    G Abich, R Reis, L Ost
    2024 IEEE International Test Conference (ITC), 207-216 , 2024
    2024
    Citations: 1
  • Guest Editorial TCAS-I Special Issue Guest Editorial Based on the 16th IEEE Latin American Symposium on Circuits and Systems
    G Abich, X Zhang
    IEEE Transactions on Circuits and Systems I: Regular Papers 73 (3), 1526-1527 , 2026
    2026
  • NSREC 2024 Special Issue of the IEEE TRANSACTIONS ON NUCLEAR SCIENCE
    G Abich, A Akturk, A Alessi, K Arnold, L Artola, M Aubry, R Austin, ...
    IEEE Transactions on Nuclear Science 72 (4) , 2025
    2025
  • Assessing Soft Error Reliability in Vectorized Kernels: Vulnerability and Performance Trade-Offs on Arm and RISC-V ISAs
    G Abich
    2025 Design, Automation & Test in Europe Conference (DATE), 1-2 , 2025
    2025
  • Power and Performance Costs of Radiation-hardened ML Inference Models Running on Edge Devices
    G Abich, AI Silva, J Gava, AA Susin, R Reis, L Ost
    2023 36th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6 , 2023
    2023
  • Soft Error Assessment Methodology
    G Abich, L Ost, R Reis
    Early Soft Error Reliability Assessment of Convolutional Neural Networks … , 2023
    2023