Dr P R Deshmukh
@gcoea.ac.in
Electronics and Telecommunication Engineering
Government College of Engineering
RESEARCH, TEACHING, or OTHER INTERESTS
Electrical and Electronic Engineering, Computer Engineering, Computer Networks and Communications, Agricultural and Biological Sciences
Scopus Publications
Scholar Citations
Scholar h-index
Scholar i10-index
Scopus Publications
Prashant R. Deshmukh and Jitendra S. Edle
IEEE
Multiplication is greatly used arithmetic operation that figures prominently in different modern applications like Image Processing, Signal Processing, Industrial Wireless Sensor Network, cryptography and many other countless applications. The predominant approach used to design classic multiplication algorithm are Booth's Technique, Array Techniques Shift-Add Techniques and much more. The present approach discloses a new technique in which multiplier component is implemented using Ancient Vedic Mathematics. To optimize the computational overheads a novel data base analyzer is included with Built in Self Test block.
Girish S. Thakare and Prashant R Deshmukh
IEEE
Energy constrained systems such as sensor networks can increase their usable lifetimes by extracting energy from their environment. This is known as energy harvesting. Task scheduling at the single nodes should account for the properties of the regenerative energy source which fluctuates, capacity of the energy storage as well as deadlines of the time critical tasks. In this paper, we address the problem of scheduling periodic, possibly self-suspending, real-time tasks. We provide schedulability tests for EDF, EDF-Slack and EEA and a feasibility test using model checking.
Girish S. Thakare and Prashant R. Deshmukh
IEEE
In this paper we discuss the real time system and its scheduling issues. We put focus on what is real time system? It's scheduling categories and criteria. The role of task energy in the scheduling algorithm and type of the energy recently demanded in the currently real time system, also several scheduling algorithm and their comparison. We present our energy driven scheduling algorithm and compare it with existing algorithm. The ambient energy taken in to the consideration here from sun light using solar. In terms of demonstration of scheduling algorithm we implement it for various metrics such as task energy, overhead and success rate.
P.A. Tijare and P.R. Deshmukh
IEEE
To achieve parallel programming in better way, load balancing plays important role. By implementing load balancing we can reduces time to execute and improvement performance of program. This paper proposes an implementation of a task in parallel that can run for number of iterations among nodes present in the network by system load taking into account. Our experiments prove the proposed algorithm reduces completion time in parallel computing task.
Jitendra S. Edle and Prashant R. Deshmukh
IEEE
Momentous signal processing elements have been designed and developed using modern integration technologies. Higher frequency of data execution with lowest power utilization in highly optimized area are the primal antithetic expectancy of the modern applications from recent technology. In order to achieve such distinguished peculiarities, in many real-time processing applications, higher throughput arithmetic operations are important. Multiplication is historic arithmetic operations in such applications. With the revolutionary developments in the field of Programmable Architectures and Integration Technology, several FPGA devices are now a days available for prototyping. Through this creative writing, a detailed comparative study of the different Field Programmable Gate Arrays of Actel, Altera, Lattice, QuickLogic and Xilinx and have been conducted and presented the analytical outcome of the study, particularly for 32-bit Vedic Multiplier Architecture, implemented using concurrent Hardware Description Language. It is strongly essential to have cogent analysis of the FPGA performances which will be helpful to the numerous small and medium scale industry owners and first generation industrialists who are much inclined to stand in the market.
Girish S Thakare and Prashant R Deshmukh
IEEE
Real-time system is very emerging field in the industry. Many intelligent, automatic products are design based on real time system. The performance of these kind of system is depends on several factors and one of them is scheduling of the real time system. Basically scheduling of the real time system depends on several parameters including deadline of task and the energy requirement for task execution. This paper deals with the different factors affecting the energy of real time system scheduling and also the effect of idle-time on the real time system.
Jitendra S. Edle and Prashant R. Deshmukh
IEEE
To cope up with the greatly challenging market needs and to meet faster time to market, forced the software industries to develop epic Simulation and Physical Verification and Implementation tools. Using the traditional integrated circuit design it is no more possible to achieve ambitions of optimized timing, area, power and gate count. However, Field Programmable Gate Array and Application Specific Integrated Circuit are the major breakthrough given by the recent technological revolution, by using which designer can go for hardware prototyping and product design in promising time. Application Specific Integrated Circuit (ASIC) is the Integrated Circuit designed for specific application. It is an Digital, Analog or Mixed Signal architecture designed specifically to meet the constraints set by the specific application. With ASIC, superior performance is promised even for highly complex and dense architecture. Through this literature, a detailed ASIC flow is disclosed considering the 32-bit Vedic Multiplier architecture, implemented using concurrent Hardware Description Language. Vedic Mathematics is the ancient indian computation techniques which proposes a different procedures for faster execution of mathematical statements. It's execution for different case studies are proved through different sutras (formulae) and up-sutras (sub-formulae).
Girish S Thakare and Prashant R Deshmukh
IEEE
Scheduling of real-time task becomes a regular activity. There are different simulation tools are available for real-time task scheduling. But recently real-time systems are used in most of devices. The tasks within these kinds systems are very smart because of that real-time need to be energy aware. Considering energy as important characteristic, very rare simulators are designed by the researchers recently. This paper deals with the inevitable study of real-time energy based scheduler EERTSS with different performances parameters. The EERTSS works on several scheduling algorithm and generates the execution trace. This simulator is developed in C/C++ features on Linux platform and helping for teaching and research work.
Prashant Deshmukh, Rahul Ingle, Vikram Kehri, and R. N. Awale
IEEE
In this work, an effective method for the presence of epileptic seizures from continuous EEG signals is carried out using machine learning algorithm. The work for detection of epileptic Seizure from EEG signals is carried out in three stages. In first stage, DWT is used for EEG signal decomposition into its corresponding sub bands. In second stage, extraction of the statistical features from each subband and finally classification of the EEG signals into epileptic seizure and normal has been done using SVM. The result from experimental analysis shows that, the proposed method is better for detection of the epileptic seizure from EEG Signals.
Girish S. Thakare and Prashant R. Deshmukh
IEEE
With change in the technology processing of the real time system is more powerful. But the change is depends on many factors and energy is one of them. Energy affects the working of the system. This paper deals with role energy constraints on the real time system. We develop a new approach energy efficient algorithm (EEA) for the real time system. The practical analysis shows that change in the scheduling policy overcome the shortage of the energy during task execution. This new policy overcomes the problem of deadline missing due to the energy.
Jitendra S. Edle and Prashant R. Deshmukh
IEEE
The present title discloses novel concept for high speed computing using essentials of Ancient Indian Vedic Mathematics, modified and implemented using VLSI-FPGA architecture for best performance. The proposed architecture aims to define highly optimized multiplier unit which allows the highly intensive units of Signal Processing, Image Processing, Data Encryption/ Decryption and most other techniques to work at full pelt. To stand at, the title is configured using Hardware Description Language (HDL) around high performance Virtex/ Kintex Series Field Programmable Gate Arrays (FPGA). After implementation the statistical data is analyzed using Synthesis and PAR using Xilinx ISE. The proposed architecture is executed at 1 MHz Frequency and concurrent architecture is developed for 2-bit, 4-bit, 8-bit, 16-bit and 32-bit.
Tejaswini Deshmukh, Prashant Deshmukh, and Pravin Dakhole
Springer Singapore
P.B. Shelke and P.R. Deshmukh
IEEE
Correct identification of person from a distance is an important issue in the field of visual surveillance and monitoring applications. To identify the person while their walking, Gait play an important role. During their walking, every parts of the human body move differently. Which part of the body, contributes more for person identification, on the basis of this, we have developed rectangular region based silhouette analysis (RRSA) algorithm to evaluate the contribution of individual parts of the body to identify the person correctly. This algorithm is tested on CASIA Gait database by using support vector machine (SVM) classifier and wavelet feature extraction method. Experimental result shows that the proposed algorithm is not only fast but also more effective.
Tejaswini P. Deshmukh, P.R. Deshmukh, and P.K. Dakhole
IEEE
The Fast Fourier Transform can be determined in Complex field and Galois field. The paper suggests the architecture for finding Fast Fourier Transform over a Galois field. This method uses the advantage of Cyclotomic decomposition. Basically decomposition of the original polynomial into a sum of linearized polynomial is done and then evaluated at a set of basis points. The Fast Fourier Transform methods can be capably used in implementations of discrete Fourier transforms over finite field, which have extensive applications in cryptography and error control codes. The method is becoming popular because of its low computational complexity. In this paper the hardware design and implementation of Cyclotomic fast Fourier transform architecture over finite field GF(24) is described.
Dhananjay M. Dakhane and Prashant R. Deshmukh
IEEE
Covert channels are created using packet header manipulation, having some serious drawbacks of detectability. TCP/IP header follows strict seam tics, if it is manipulate by a single bit, semantics will not seem to be a normal distribution. Here we are proposed the IP-ID Reference Model as a new way covert communication. This model is implemented in Linux kernel 3.0, as a proof of concept. The idea of our proposed model is, sender is not actually embedding the covert message into IPV4 Identification (ID) field, instead of that it uses its reference to convey the covert message to the receiver. So this field is observed as a normal packet distribution and can be created by any Linux or BSD Kernel. In a proof of concept, we develop Linux Loadable Kernel Modules (LKM) and application layer utility for generating network traffic with existing Linux kernel. Our embedding algorithm is not modifying a single bit of IPV4 identification (ID) field, so the structure and non-uniformity of this field is maintain.
Sonali Patil, P. R. Deshmukh, Tejal Chavan, Priyanka Sangwan, Vinay Shastri, and Akash Sunthwal
IEEE
Communication over the network generally consists of conveying the messages in the form of texts and images. In recent times communication through audio has been introduced and has changed the scenario of transmission and reception of messages, which makes it mandatory to provide proper security to the audio data. Audio Secret Sharing provides a means of transmitting the secret audio message over a network securely. This is done essentially by dividing the original secret message into a pre-defined number of shares. To formulate the original secret a specified number of shares have to be combined and anything less than the specification provided would render the message unattainable. This paper puts forth the Audio Secret Sharing scheme based on Matrix Projection. The proposed scheme lends security and reliability to the audio files and also the share size has been reduced to a great extent.
Dhananjay M. Dakhane and Prashant R. Deshmukh
IEEE
Network covert channel generally use for leak the information by violating the security policies. It allows the attacker to send as well as receive secret information without being detected by the network administrator or warden in the network. There are several ways to implement such covert channels; Storage covert channel and Timing covert channel. However there is always some possibility of these covert channels being identified depending on their behaviour. In this paper, we propose, an active warden, which normalizes incoming and outgoing network traffic for eliminating all possible storage based covert channels. It is specially design for TCP sequence number because this field is a maximum capacity vehicle for storage based covert channel. Our experimental result shows that propose active warden model eliminates covert communication up to 99%, while overt communication is as intact.
P.B. Shelke and P.R. Deshmukh
IEEE
To improve the performance of gait based human identification system, gender can plays an important role in the field of surveillance and monitoring applications. The proposed algorithm consist of four steps. In initial step, silhouette object detection is take place by using background subtraction and morphological operation. In segmentation step, silhouette body is divided into six regions. Then their gait features are extracted by using 2D discrete wavelet transform and finally the K-Nearest Neighbor (KNN) classifier is employed to classify the gender for identification of the person. To evaluate the performance of the proposed algorithm, experiments are conducted on CASIA Gait database. An experimental result shows that the proposed method is more effective for gender identification using gait biometrics. The proposed approach achieved highly competitive performance compare with earlier published methods.
Roshani Ade and P. R. Deshmukh
IEEE
The amount of students data in the education system databases is growing day by day, so the knowledge taken out from these data need to be updated continuously. The training set of the supervised learning algorithms contains student's score in the test. Incremental learning ability is further significant for machine learning methodologies as student's data and the information is increasing. Against to the classical batch learning algorithm, incremental learning algorithm tries to forget unrelated information while training new instances. Now a days, combination of a classifiers is a novel concept for overall progress in the classification result. Therefore, an incremental ensemble of two classifiers namely Naïve Bayes, K-Star using majority voting scheme is proposed. The large scale comparison of a proposed ensemble technique by using different voting scheme with the state-of the art algorithm on the student's data set has been done. The experimental results shown high accuracy for the proposed ensemble for the student's classification. High accuracy was also achieved for the majority voting scheme as compared to other voting scheme.
Roshani Ade and P.R. Deshmukh
Elsevier BV
Roshani Ade and Prashant Deshmukh
Springer India
Roshani Ade and P. R. Deshmukh
IEEE
The ability to predict the career of students can be beneficial in a huge number of different techniques which are connected with the education structure. Student's marks and the result of some kind of psychometric test on students can form the training set for the supervised data mining algorithms. As the student's data in the educational systems is increasing day by day, the incremental learning properties are important for machine learning research. Against to the classical batch learning algorithm, incremental learning algorithm tries to forget unrelated information while training new instances. These days, combining classifiers is nothing but taking more than one opinion contributes a lot, to get more accurate results. Therefore, a suggestion is an incremental ensemble of three classifiers namely Naïve Bayes, K-Star, SVM using voting scheme. The ensemble technique proposed in this paper is compared with the incremental algorithms, without any ensemble concept, for the student's data set and it was found that the proposed algorithm gives better accuracy.
Dhananjay M. Dakhane and Prashant R. Deshmukh
IEEE
It is observed that covert channels can be easily implemented in TCP/IP stack. It is easily achieved by embedding the covert message in the various header fields seemingly filled with "Random" data such as TCP Sequence Number (SQN), IP Identification (ID) etc. Such manipulation of these fields which seems "random" at first sight but might be detected with the help of various techniques. In this research paper we are proposing Sequence Number Reference Model as a Proof-of-Concept for sending the covert message using TCP Sequence Number (SQN) field without changing the semantics of its header field. Covert message in the packet cannot be detected by the conventional covert channel detection techniques since not a single bit of this header field is modified. We are providing a mechanism by which sender can send the covert message and receiver can interpret the same in spite of the fact that the actual covert message will not be carried by the sequence number field of TCP header.
Sonali Patil and Prashant Deshmukh
IEEE
This paper is an extension of (t, n) threshold secret sharing scheme based on Matrix Projection. The proposed scheme achieves publicly verifiable image secret sharing with identification of cheaters. The added functionality uses asymmetric key algorithm to identify the cheaters. The scheme can identify up to n number of cheaters. The experimental results show that proposed scheme is accurate, secure and with small size of shares than the original secret image.
Roshani Ade and P. R. Deshmukh
IEEE
The amount of students data in the educational databases is growing day by day, so the knowledge taken out from these data need to be updated continuously. In the circumstances, where there is a need of handling continuous flow of student's data, there is a challenge of how to handle this massive amount of data into the information and how to accommodate new knowledge introduces with the new data. In this paper, the adaptive incremental learning algorithm for Students classification system is proposed, which competently transforms the knowledge throughout the system and also detects the new concept class efficiently. In this paper, conceptual view of the system is designed with the algorithm and experimental results on the student's data as well as some available data sets are used to prove the efficiency of the proposed algorithm.