G.NagaJyothi

@asst.professor

Asst.Professor and ECE
Madanapalle Institute of Technology and Science



                 

https://researchid.co/gnagajyothi

working as Asst. Professor in the ECE department at Madanapalle Institute of Technology and Science. She completed her full-time Ph.D. in VIT in 2020. She has around 16 national and International Scopus and SCI journals.

EDUCATION

Institute of Technology
M.Tech-2008-Vellore Institute of Technology
B.Tech-2006-JNTU-Ananatapore

RESEARCH, TEACHING, or OTHER INTERESTS

Hardware and Architecture, Engineering, Speech and Hearing, Electrical and Electronic Engineering

18

Scopus Publications

349

Scholar Citations

11

Scholar h-index

12

Scholar i10-index

Scopus Publications

  • CNN-Based Voice Recognition by Self-Governing Robots to Improve Computer-Human Communication
    Ben Sujin. B
    Science Research Society
    Robots must have the ability to recognize human emotions to engage with individuals and to plan their movements autonomously. Nonverbal signals encompassing pitch, loudness, spectrum, and speech speed are successful methods for transmitting emotions to most individuals. Provided this situation, a machine could have the capability of qualified figure out emotions by deploying the traits of spoken communication, and these potentially propagate vital information concerning the speaker's emotional state. More precisely, a combination of numerous facial action units can be employed to describe a human's emotion. In this paper, we propose a deep Convolutional Neural Network-based system that can identify sentiments in real-time and with a high accuracy rate. This investigation establishes an entirely novel speech-emotion detection system founded on Convolutional Neural Networks (CNNs). With the support of a top-tier GPU, a model is developed and nourished raw speech from a specific set for training, classification, and testing purposes.  We further analyze the speech data and incorporate the information from the visual and audio sources to enhance the recognition system's accuracy. The benefits of the proposed method for emotion identification and the implications of blending visual and aural suggestions are made clear by the experimental results. Convolutional neural networks (CNNs) are taught on grayscale images from the softmax dataset in the present work. To acquire the best accuracy, we experimented with different baselines and max pooling layers, finally acquiring 89.98% accuracy. Dropout is one approach we have used to ward off overfitting.

  • Utilization of IoT-assisted computational strategies in wireless sensor networks for smart infrastructure management
    K. M Karthick Raghunath, Manjula Sanjay Koti, R. Sivakami, V. Vinoth Kumar, Grande NagaJyothi, and V. Muthukumaran
    Springer Science and Business Media LLC

  • Enhancing Network Forensic and Deep Learning Mechanism for Internet of Things Networks
    J. Avanija, K. E. N. Kumar, Ch Usha Kumari, G. N. Jyothi, Srujan Raju and Reddy Madhavi
    CSIR-National Institute of Science Communication and Policy Research (NIScPR)
    The integration of intelligence into everyday products has been possible due to the ongoing shrinking of hardware and a rise in power efficiency. The Internet of Things (IoT) area arose from the tendency to add computational capabilities to so-called non-intelligent daily items. IoT systems are attractive targets for cyber-attacks because they have many applications. Adversaries use a variety of Advanced Persistent Threat (APT) strategies and trace the source of cyber-attack events to safeguard IoT networks. The Particle Deep Framework (PDF), which is proposed in this study, is a novel Network Forensics (NF) that encompasses the digital investigative phases for spotting & tracing attack activity in IoT networks. The suggested framework contains three novel functionalities for dealing with encrypted networks, such as collecting network data flows & confirming their integrity, using a PSO algorithm, "Bot-IoT "& "UNSW NB15" datasets. The suggested PDF is related to several deep-learning methods. Experimental outcomes show that the proposed framework is very good at discovering & tracing cyber-attack occurrences when compared to existing approaches. The proposed design is implemented using neural network technology. The proposed design has 10% accuracy when compared with the existing structure. This paper is expected to offer a quick reference for researchers interested in understanding the use of network

  • Breast Cancer Detection Using Deep Learning Model
    Aliya Thaseen, Raheem Unnisa, Naheed Sultana, K. Reddy Madhavi, Grande. NagaJyothi, and S. Kirubakaran
    Springer Nature Singapore

  • High-Speed Low Area 2D FIR Filter Using Vedic Multiplier
    Grande Nagajyothi, G. Pavan Kumar, Budati Suresh Kumar, B. P. Deepak Kumar, and A. K. Damodaram
    Springer Nature Singapore

  • Multiple Degradation Skilled Network for Infrared and Visible Image Fusion Based on Multi-Resolution SVD Updation
    Gunnam Suryanarayana, Vijayakumar Varadarajan, Siva Ramakrishna Pillutla, Grande Nagajyothi, and Ghamya Kotapati
    MDPI AG
    Existing infrared (IR)-visible (VIS) image fusion algorithms demand source images with the same resolution levels. However, IR images are always available with poor resolution due to hardware limitations and environmental conditions. In this correspondence, we develop a novel image fusion model that brings resolution consistency between IR-VIS source images and generates an accurate high-resolution fused image. We train a single deep convolutional neural network model by considering true degradations in real time and reconstruct IR images. The trained multiple degradation skilled network (MDSNet) increases the prominence of objects in fused images from the IR source image. In addition, we adopt multi-resolution singular value decomposition (MRSVD) to capture maximum information from source images and update IR image coefficients with that of VIS images at the finest level. This ensures uniform contrast along with clear textural information in our results. Experiments demonstrate the efficiency of the proposed method over nine state-of-the-art methods using five image quality assessment metrics.

  • Designing a Fuzzy Q-Learning Power Energy System Using Reinforcement Learning
    Avanija J., Suneetha Konduru, Vijetha Kura, Grande NagaJyothi, Bhanu Prakash Dudi, and Mani Naidu S.
    IGI Global
    Modern power and energy systems are becoming more complicated and uncertain as distributed energy resources (DERs), flexible loads, and other developing technologies become more integrated. This brings great challenges to the operation and control. Furthermore, the deployment of modern sensor and smart metres generates a considerable amount of data, which opens the door to fresh data-driven ways for dealing with complex operation and control difficulties. One of the most commonly touted strategies for control and optimization problems is reinforcement learning (RL). Designing a fuzzy Q-learning power energy system using RL technique will control and reduce the problems arranging in the energy system.

  • ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems
    Grande Naga Jyothi, Kishore Sanapala, and A. Vijayalakshmi
    Springer Science and Business Media LLC

  • High speed low area OBC DA based decimation filter for hearing aids application
    Grande NagaJyothi and Sriadibhatla Sridevi
    Springer Science and Business Media LLC

  • ASIC Implementation of Fixed-Point Iterative, Parallel, and Pipeline CORDIC Algorithm
    Grande Naga Jyothi, Kundu Debanjan, and Gorantla Anusha
    Springer Singapore

  • High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter
    Grande NagaJyothi and Sriadibhatla Sridevi
    Springer Science and Business Media LLC

  • Low power design of 2–4 and 4–16 line decoders
    Grande Naga Jyothi, , Gorantla Anusha, Debanjan Kunda, , and
    Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
    Here, we are proposing a novel design of 2:4 decoder and 4:16 decoders which are designed by using line decoder concept. By using proposed design, the area and power consumption of 2:4 decoder and 4:16 decoder can be reduced. In the existing work they have used DVL (Dual Value Logic) and Transmission gate Logic to implement a 14-Transistor 2:4 decoder for minimizing the transistor count. By using 2:4 pre-decoders and post-decoders they implemented 4:16 decoders. Mixed logic is also used for this purpose. Here we have implemented a single 2:4 decoder with minimum transistor count and low power consumption which is used to design a 4:16 decoder. We implement the proposed design in Cadence Virtuoso simulation at 90nm technology and calculated the power and area.

  • ASIC implementation of low power, area efficient adaptive FIR filter using pipelined DA
    Grande Naga Jyothi and Sridevi Sriadibhatla
    Springer Singapore

  • High Speed FinFET Traff Comparator Based Function Generator
    Debanjan Kundu, Sonali Guin, Grande NagaJyothi, and Sriadibhatla Sridevi
    IEEE
    The advancement of FinFET based applications are emerging rapidly over the last few years due to its advantages in terms of power and speed over CMOS technology. Current Comparator (CC) find its wide application in the circuits which use Multi-Valued Logic (MVL) along with the analogue circuits and various electronics devices over decades. Mainly in ADC or any sensing devices, the CC finds its application. Exiting model of function generator had been implemented in CMOS 180nm technology. The configuration consists of second generation current conveyor (CCII) as an active device then followed by Schmitt trigger and current mode integrator. In this paper, the logic of Traff comparator has been used to develop the current comparator-based function generator [2] in both CMOS and FinFET technology. Due to FinFET's high speed and low power consumption ability, a noble approach is used by implementing the function generator using FinFET in 30nm technology and the and the output obtained from this system is compared with the outputs of the function generator on CMOS 90nm technology.

  • A low power 10 bit 50-MS/s sample and hold OTA amplifier
    R. Sakthivel, Grande Naga Jyothi, and N. Dilip Kumar
    ACM
    This paper presents about the design of a low power 10-bit 50-M sample /sec Sample and Hold amplifier. A sample and hold amplifier (SHA) acts as a front end block for an Analog Digital Circuit (ADC). To realize a low power SHA, a power efficient Operational Tran-conductance Amplifier (OTA) is to be designed and used. In the literature, many topologies of OTA are proposed for low power. In this paper, an Improved Recycling Folded Cascade (IRFC) OTA existing in the literature is used for realizing SHA and is proposed. In addition to this the SHA includes bottom plate sampling and bootstrap switch to reduce the non-linear distortion. The IRFC OTA used in the design of SHA is implemented using TSMC 90 nm Process. It achieves a DC gain of 73 dB, Unity Gain Bandwidth (UGB) of 70 MHz and with a phase margin of 63 degrees. The proposed SHA is designed and simulated using spectre simulator. From the simulation, it is noted that the SHA achieves a Spurious Free Dynamic Range (SFDR) of 63.44dB and SNDR of 60.6dB for a sampling frequency of 50MS/s with a peak-peak voltage of 1.2 Volts. The S/H circuit consumes 0.44mW of power.

  • Low power, low area adaptive finite impulse response filter based on memory less distributed arithmetic
    Grande Naga Jyothi and Sriadibhatla Sridevi
    American Scientific Publishers

  • ASIC implementation of shared LUT based distributed arithmetic in FIR Filter
    Naga Jyothi Grande and Sriadibhatla Sridevi
    IEEE
    This paper presents a brief on the implementation of reconfigurable shared LUT (look-up-table) based Distributed Arithmetic (DA) for the higher order finite-impulse response (FIR) filters whose filter coefficients can be changed during run time. In this architecture all the multipliers and adders are replaced by the register banks, multiplexers and the shifters. The throughput rate of the design is increased by having shared LUTs instead of ROM in the DA FIR filter architecture. By implementing this concept in ASIC, the area, area delay product (ADP), minimum cycle period (MCP) and energy per sample are reduced when compare with the conventional DA architecture. The architecture supports 95 MHz sampling frequency.

  • Distributed arithmetic architectures for FIR filters-A comparative review
    Grande NagaJyothi and Sriadibhatla SriDevi
    IEEE
    Finite impulse response (FIR) filter is an influential block in various signal processing applications. The complexities in VLSI implementation of FIR filters is dominated by the number of multiply and accumulate (MAC) operations. Distributed Arithmetic (DA) is an alternative technique where the MAC operations can be replaced by a series of look-up tables and addition operations. FIR filter based on DA are computationally efficient because of high degree of mechanization involved in the implementation of MAC operations using DA. Many reconfigurable and non-reconfigurable FIR filter architectures can be developed using DA. This paper reviews the existing FIR filter architectures based on DA. LUT based DA and LUT-less DA are the significant methods in the implementation of non-reconfigurable filters. This brief summarizes the area and power reports of the existing non-reconfigurable FIR filter architectures based on both LUT based DA and LUT-less DA. One dimensional and two dimensional systolic DA based architectures for FIR filter implementation are also briefed. DA based adaptive FIR techniques are explained. This paper presents the comparative results of FIR and adaptive FIR filter architectures in terms of area, power, area-delay product, minimum cycle period and energy per sample. This survey can form a basis for further research on DA based FIR filter architectures.

RECENT SCHOLAR PUBLICATIONS

  • AA-TransDeeplabv3+: a novel semantic segmentation framework for aerial images using adaptive and attentive based Transdeeplabv3+ with hybrid optimization technique
    P Anilkumar, P Venugopal, K Lokesh, G NagaJyothi, M Nanda kumar
    Signal, Image and Video Processing 19 (3), 225 2025

  • Novel Synchronous Counters Using Flip Flops for Low Power Applications
    A Swathi, T Devaraju, K Sandeep Kumar, K Bhavya, Y Poornima, ...
    International Conference on Intelligent Healthcare and Computational Neural 2025

  • A Novel Low Complexity SLM for PAPR Reduction in OFDM
    D Bhavana, SP Devulapalli, G Naga Jyothi, TN Prasad, J Rajyalakshmi
    International Conference on Intelligent Healthcare and Computational Neural 2025

  • Deep Learning Classification of Diabetic Retinopathy Using ResNet-101 Convolutional Neural Networks
    R Ravindraiah, GN Jyothi, JP Royal, BN Reddy, BN Kumar
    Convergence of Internet of Medical Things (IoMT) and Generative AI, 417-438 2025

  • Enhanced Diabetic Retinopathy Classification Using Inception Net V3: A Deep Learning Approach
    R Ravindraiah, GN Jyothi, NB Kumar, B Ganesh, D Badri
    Convergence of Internet of Medical Things (IoMT) and Generative AI, 267-290 2025

  • CNN based Voice Recognition by self governing Robots to Improve computer-Human Communication
    DGNJ M.Sakthivel
    Advances in Nonlinear Variational Inequalities 28 (2), 128-134 2025

  • Development and Assessment of a Four-Element Ultra-Wideband (UWB) MIMO Antenna System for 5G Implementations
    GM Rafi, NJ Grande, K Naveen, R Harish, P Venkatesh
    2024 3rd International Conference on Artificial Intelligence For Internet of 2024

  • BINAURAL HEARING AID NOISE REDUCTION USING AN EXTERNAL MICROPHONE
    GN Jyothi, K Vijetha, KR Madhavi, K Suneetha, SS Chakravarthi
    Innovations in Computational Intelligence, Big Data Analytics and Internet 2024

  • Utilization of IoT-assisted computational strategies in wireless sensor networks for smart infrastructure management
    KM Karthick Raghunath, MS Koti, R Sivakami, V Vinoth Kumar, ...
    International Journal of System Assurance Engineering and Management 15 (1 2024

  • Enhancing Network Forensic and Deep Learning Mechanism for Internet of Things Networks
    J Avanija, KEN Kumar, CU Kumari, GN Jyothi, KS Raju, KR Madhavi
    Journal of Scientific & Industrial Research (JSIR) 82 (05), 522-528 2023

  • High-Speed low area 2D FIR filter using Vedic multiplier
    G Nagajyothi, GP Kumar, BS Kumar, BPD Kumar, AK Damodaram
    Proceedings of Third International Conference on Advances in Computer 2023

  • Breast cancer detection using deep learning model
    A Thaseen, R Unnisa, N Sultana, KR Madhavi, G NagaJyothi, ...
    Proceedings of Third International Conference on Advances in Computer 2023

  • Multiple degradation skilled network for infrared and visible image fusion based on multi-resolution svd updation
    G Suryanarayana, V Varadarajan, SR Pillutla, G Nagajyothi, G Kotapati
    Mathematics 10 (18), 3389 2022

  • Designing a fuzzy Q-learning power energy system using reinforcement learning
    J Avanija, S Konduru, V Kura, G NagaJyothi, BP Dudi
    International Journal of Fuzzy System Applications (IJFSA) 11 (3), 1-12 2022

  • Comparative review of MAC architectures
    P Dinesh, K Sanapala, GN Jyothi, R Sakthivel
    Soft Computing for Intelligent Systems: Proceedings of ICSCIS 2020, 27-33 2021

  • Asic implementation of linear equalizer using adaptive fir filter
    GN Jyothi, A Gorantla, T Kudithi
    International Journal of e-Collaboration (IJeC) 16 (4), 59-71 2020

  • High speed low area OBC DA based decimation filter for hearing aids application
    G NagaJyothi, S Sridevi
    International Journal of Speech Technology 23, 111-121 2020

  • ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems
    GN Jyothi, K Sanapala, A Vijayalakshmi
    International Journal of Speech Technology, 1-6 2020

  • ASIC implementation of fixed-point iterative, parallel, and pipeline CORDIC algorithm
    G Naga Jyothi, K Debanjan, G Anusha
    Soft Computing for Problem Solving: SocProS 2018, Volume 1, 341-351 2020

  • High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter
    G NagaJyothi, S Sridevi
    Multimedia Tools and Applications 78, 32679-32693 2019

MOST CITED SCHOLAR PUBLICATIONS

  • Distributed arithmetic architectures for fir filters-a comparative review
    G NagaJyothi, S SriDevi
    2017 International Conference on Wireless Communications, Signal Processing 2017
    Citations: 60

  • ASIC implementation of distributed arithmetic based FIR filter using RNS for high speed DSP systems
    GN Jyothi, K Sanapala, A Vijayalakshmi
    International Journal of Speech Technology, 1-6 2020
    Citations: 47

  • Utilization of IoT-assisted computational strategies in wireless sensor networks for smart infrastructure management
    KM Karthick Raghunath, MS Koti, R Sivakami, V Vinoth Kumar, ...
    International Journal of System Assurance Engineering and Management 15 (1 2024
    Citations: 35

  • High speed and low area decision feed-back equalizer with novel memory less distributed arithmetic filter
    G NagaJyothi, S Sridevi
    Multimedia Tools and Applications 78, 32679-32693 2019
    Citations: 34

  • Enhancing Network Forensic and Deep Learning Mechanism for Internet of Things Networks
    J Avanija, KEN Kumar, CU Kumari, GN Jyothi, KS Raju, KR Madhavi
    Journal of Scientific & Industrial Research (JSIR) 82 (05), 522-528 2023
    Citations: 23

  • High speed low area OBC DA based decimation filter for hearing aids application
    G NagaJyothi, S Sridevi
    International Journal of Speech Technology 23, 111-121 2020
    Citations: 20

  • Asic implementation of low power, area efficient adaptive fir filter using pipelined da
    G Naga Jyothi, S Sriadibhatla
    Microelectronics, Electromagnetics and Telecommunications: Proceedings of 2018
    Citations: 20

  • Asic implementation of linear equalizer using adaptive fir filter
    GN Jyothi, A Gorantla, T Kudithi
    International Journal of e-Collaboration (IJeC) 16 (4), 59-71 2020
    Citations: 18

  • Asic implementation of shared lut based distributed arithmetic in fir filter
    NJ Grande, S Sridevi
    2017 International conference on microelectronic devices, Circuits and 2017
    Citations: 18

  • Low power, low area adaptive finite impulse response filter based on memory less distributed arithmetic
    GN Jyothi, S Sridevi
    Journal of Computational and Theoretical Nanoscience 15 (6-7), 2003-2008 2018
    Citations: 15

  • Multiple degradation skilled network for infrared and visible image fusion based on multi-resolution svd updation
    G Suryanarayana, V Varadarajan, SR Pillutla, G Nagajyothi, G Kotapati
    Mathematics 10 (18), 3389 2022
    Citations: 12

  • High speed finfet traff comparator based function generator
    D Kundu, S Guin, G NagaJyothi, S Sridevi
    2018 International Conference on Computation of Power, Energy, Information 2018
    Citations: 10

  • Designing a fuzzy Q-learning power energy system using reinforcement learning
    J Avanija, S Konduru, V Kura, G NagaJyothi, BP Dudi
    International Journal of Fuzzy System Applications (IJFSA) 11 (3), 1-12 2022
    Citations: 8

  • High-Speed low area 2D FIR filter using Vedic multiplier
    G Nagajyothi, GP Kumar, BS Kumar, BPD Kumar, AK Damodaram
    Proceedings of Third International Conference on Advances in Computer 2023
    Citations: 7

  • Breast cancer detection using deep learning model
    A Thaseen, R Unnisa, N Sultana, KR Madhavi, G NagaJyothi, ...
    Proceedings of Third International Conference on Advances in Computer 2023
    Citations: 6

  • ASIC implementation of fixed-point iterative, parallel, and pipeline CORDIC algorithm
    G Naga Jyothi, K Debanjan, G Anusha
    Soft Computing for Problem Solving: SocProS 2018, Volume 1, 341-351 2020
    Citations: 6

  • Design of FINFET based DRAM cell for low power applications
    GN Jyothi, G Anusha, ND Kumar, D Kundu
    Computer-Aided Developments: Electronics and Communication, 35-43 2019
    Citations: 3

  • A low power 10 bit 50-ms/s sample and hold ota amplifier
    R Sakthivel, GN Jyothi, ND Kumar
    Proceedings of the 2018 International Conference on Communication 2018
    Citations: 3

  • Comparative review of MAC architectures
    P Dinesh, K Sanapala, GN Jyothi, R Sakthivel
    Soft Computing for Intelligent Systems: Proceedings of ICSCIS 2020, 27-33 2021
    Citations: 2

  • Low Power Design of 2–4 and 4–16 Line Decoders
    GNJ Debanjan K, G Anusha
    International Journal of Innovative Technology and Exploring Engineering 2019
    Citations: 2