Bishwa Ranjan Roy
@aus.ac.in
Associate professor, Department of Computer Science
Assam University
RESEARCH, TEACHING, or OTHER INTERESTS
Computer Science, Hardware and Architecture, Computer Science Applications, Computer Engineering
Scopus Publications
Scopus Publications
Purnendu Das, Nurulla Mansur Barbhuiya, and Bishwa Ranjan Roy
IEEE
The degree of parallelism in the systems is expected to increase, which will result in an increase in the number of cores in chip multicore processors (CMP). As a result, in order to satisfy the requirements of a wide range of applications, it is necessary to ensure that cache resources are managed effectively. Cache partitioning is a strategy that provides the benefits of shared Last Level Caches (LLC) as well as the performance isolation of private caches. This is accomplished by separating the cache in accordance with the requirements of the applications that are using it. However, dividing the cache without using the appropriate procedure could result in a decrease in performance. Therefore, in order to achieve all of the attributes of cache partitioning, we need to employ the appropriate approaches. In this study, our goal is to investigate way-based cache partitioning in detail.
Purnendu Das and Bishwa Ranjan Roy
Springer Singapore
Purnendu Das and Bishwa Ranjan Roy
Springer Singapore
Purnendu Das and Bishwa Ranjan
The Science and Information Organization
Replacement policy plays a major role in improving the performance of the modern highly associative cache memo-ries. As the demand of data intensive application is increasing it is highly required that the size of the Last Level Cache (LLC) must be increased. Increasing the size of the LLC also increases the associativity of the cache. Modern LLCs are divided into multiple banks where each bank is a set-associative cache. The replacement policy implemented on such highly associative banks consume significant hardware (storage and area) overhead. Also the Least Recently Used (LRU) based replacement policy has an issue of dead blocks. A block in the cache is called dead, if the block is not used in the future before its eviction from the cache. In LRU policy, a dead block can not be remove early until it become LRU-block. So, we have proposed a replacement technique which is capable of removing dead block early with reduced hardware cost between 77% to 91% in comparison to baseline techniques. In this policy random replacement is used for 70% ways and LRU is applied for rest of the ways. The early eviction of dead blocks also improves the performance of the system by 5%.
Sanju Das, Purnendu Das, and Bishwa Ranjan Roy
Springer Singapore
Purnendu Das*, , Bishwa Ranjan Roy*, and
Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
As the data requirement of today’s application is increasing the size of the cache memory in a multicore processor is also increasing. A multicore processor has many levels of cache memory. The Last Level Cache (LLC) is normally shared by all the cores and its size must be large enough to handle today’s data intensive applications. Such larger sized set-associative LLC facing major challenges to efficiently implement the replacement policy of its sets. As the number of ways are increasing in the LLC, the replacement policy becomes a bottleneck of the system. To improve the performance of the system and to reduce the hardware overhead, in this paper we propose a simple but hardware efficient replacement policy for the larger sized LLCs. We call the techniques as SplitWays as it divides (splits) the ways of a set into multiple groups called wayGroups. Each wayGroup maintains its own replacement policy. Experimental analysis using full-system simulator found that the proposed technique reduces the hardware overhead by up to 66% without any performance degradation..
Bishwa Ranjan Roy, Amit Kumar Trivedi, Arun Kumar Yadav, and Saptarshi Paul
IEEE
In fingerprint reconstruction, construction of correct orientation field plays an important role. This paper explains very simple and effective approach to estimate fingerprint orientation field (OF) more accurately. The false minutiae points, present in the template can be remove by calculating Euclidean distance between two minutiae point. Minutiae pair having very small Euclidean distance can be neglected. Initially, orientation is estimated locally by applying Delaunay triangular interpolation on three minutiae points which take barycentric coordinates as weight factor. later, the estimated orientation field is enhanced globally applying STFT technique so that more accurate orientation field can be achieved. The performance of fingerprint recognition system can be improved by constructing original fingerprint from this reconstructed orientation field.
Bishwa Ranjan Roy and Amit Kumar Trivedi
IEEE
Construction of correct orientation field from minutia template is a critical problem in fingerprint recognition system. In this paper, a robust technique is proposed to construct fingerprint orientation field from minutia template based on interpolation. In order to perform interpolation, the Delaunay triangulation is used to create triangular triplet of minutia points. The bi-directional property of fingerprint ridge orientation is considered to achieve the minimum tolerance interval among the minutia points of a triplet. Barycentric coordinates of a point located inside a triangular region are considered as weight factor for the corresponding vertices. Experimentally, we observe that the weighted interpolation within smaller tolerance interval gives more accurate estimation. The performance of fingerprint recognition system can be improved by applying our proposed orientation estimation method.