Poornachandran R
@vsbec.com
Assistant Professor & Head and Department of Electronics and Communication
V.S.B. Engineering College
RESEARCH, TEACHING, or OTHER INTERESTS
Electrical and Electronic Engineering, General Engineering
Scopus Publications
Scholar Citations
Scholar h-index
Scopus Publications
S. Baskaran, R. Saravana Kumar, V. Saminathan, R. Poornachandran, N. Mohan Kumar, and V. Janakiraman
Informa UK Limited
ABSTRACT In this work, the impact of high-K and gate-to-drain spacing (Lgd ) in InAs-based double-gate metal oxide semiconductor high-electron-mobility transistor (DG-MOS-HEMT) is analyzed for low-loss and high-frequency applications using 2D Sentaurus TCAD simulation. In this device, HfO2 is utilized as the dielectric material and that offers a reduced leakage current. The device with small gate-to-drain spacing (Lgd ) gives an exquisite device operation in enhancement mode (E-mode) operation with a positive threshold voltage (VT ) of 0.1223 V, the high drain current (Ids,sat ) of 1.38 mA/µm, transconductance (gm ) of 1.59 ms/µm, and sub-threshold slope (SS) of 75 mV/dec is achieved. These superior properties in this device show a high cut-off frequency (fT ) of 547 GHz and the maximum oscillation frequency of (fmax ) of 740 GHz. The numerical device simulation results show that DG-MOS-HEMT with HfO2 as dielectric offers a remarkable control of leakage current and makes it suitable for low-power, low-noise, and high-frequency applications.
G. Sujatha, N. Mohankumar, R. Poornachandran, R. Saravanakumar, and M. Karthigai Pandian
Springer Science and Business Media LLC
G. Sujatha, N. Mohankumar, R. Poornachandran, R. Saravana Kumar, Girish Shankar Mishra, V. Mahesh, and M. Arunkumar
Springer Science and Business Media LLC
G. Sujatha, N. Mohankumar, R. Poornachandran, R. Saravana Kumar, Girish Shankar Mishra, V. Mahesh, and M. Arunkumar
Springer Science and Business Media LLC
R. Poornachandran, N. Mohan Kumar, R. Saravana Kumar, and S. Baskaran
Springer Science and Business Media LLC
R. Poornachandran, N. Mohankumar, R. Saravana Kumar, G. Sujatha, and M. Girish Shankar
Springer Science and Business Media LLC
R. Saravana Kumar, N. Mohankumar, S. Baskaran, and R. Poornachandran
Springer Singapore
R. Poornachandran, N. Mohankumar, R. Saravanakumar, and G. Sujatha
Springer Science and Business Media LLC
R. Saravana Kumar, P. M. Rubesh Anand, S. Karthick, R. Nirmal Kumar, R. Poornachandran, and N. Mohan Kumar
IEEE
High Electron Mobility Transistor (HEMT) is currently playing a major role in electronics industries for low and high-power applications along with high frequency operations. In this paper, simulation of single gate enhancement mode InAs based composite channel MOSHEMT devices is performed for low power applications leading to the superior analog and RF performances. This performance is achieved by focusing the work towards the lattice matched composite channel, a recessed gate structure, HfO2 gate dielectric, and optimized source to drain spacing. The device performance characteristics are systematically analyzed with the optimized device dimensions of gate length (LG) = 50 nm, Barrier thickness (TB) = 3 nm, channel thickness (TCH) = 15 nm for the various gate to drain spacing. The reduction of a gate to drain spacing helps in minimizing the drain resistance and increased electron velocity. This effects in improving the transconductance (gm), drain current (ID), cutoff frequency (ft) along with the expense of short channel effects.
Poornachandran R., Mohankumar N., Saravana Kumar R., and Sujatha G.
Wiley
AbstractThis paper gives a comprehensive detail about an emerging InAs high electron mobility transistor (HEMT) technology with proper material combination making it suitable for low‐power and high‐frequency applications. Over the decade, various material combinations were adopted to improve the sheet‐carrier density and frequency performances. In this work, we report the performance and optimization of 30‐nm gate length InAs‐based dual channel double gate (DCDG) HEMT for terahertz application. The dual channel is formed in the device due to the combination of five layers (In0.7Ga0.3As/InAs/In0.7Ga0.3As/InAs/In0.7Ga0.3As) and thus provides a significant improvement in drain current and transconductance. Moreover, the gate scaling with optimized gate to drain‐side recess length of gate (Lrd) leads to reduced parasitic (Cgg) and tremendously increases the RF performance metrics fmax and fT. For this device, high drain current of 2.203 mA/μm with peak transconductance of 4.77 mS/μm is observed. Further optimization of Lrd results in peak fT of 810 GHz and fmax of 900 GHz at a drain source voltage Vds = 0.5 V. These parameters empower a feasibility of the device for submillimeter as well as terahertz applications.
R Saravana Kumar, R Poornachandran, S Baskaran, N Mohan Kumar, S Sandhiya, and K.U Shanmugapriya
IEEE
In this work, Double delta doped with double gate (DG) Metal Oxide Semiconductor High Electron Mobility Transistor (MOSHEMT) is distinguished by the novel design features such as a multicap layer, thin InAlAs barrier, composite channel and recessed gate with HfO2 as a gate dielectric material, which are applicable for high-frequency applications. The performance of DG MOSHEMT is characterized by TCAD Sentarus simulations, where the results are obtained in terms of high drain current, high transconductance, high cutoff frequency and Maximum frequency of oscillation while compared with single gate HEMT structure.
R Poornachandran, N Mohankumar, R Saravana Kumar, S Baskaran, and S Kumutha
IEEE
In this paper, we report the noise performance of a 50nm gate length InAs based DG-HEMT for high frequency applications. Normally the noise is predominant at the channel/barrier interface caused by scattering of carriers thus increasing the leakage mechanism. The noise spectral density, <tex>$\\mathrm{S}_{\\text{vg}}, \\mathrm{S}_{\\text{vd}}$</tex> and <tex>$\\mathrm{S}_{\\text{ig}}, \\mathrm{S}_{\\text{id}}$</tex> as a function of <tex>$\\mathrm{V}_{\\text{gs}}$</tex> and <tex>$\\mathrm{V}_{\\text{ds}}$</tex> and frequency are analyzed in detail, from these values NF<inf>min</inf> is also determined for double gate InAs HEMT. For 50nm DG-HEMT, <tex>$\\text{NF}_{\\min}$</tex> of 1.2 dB at 710GHz with <tex>$\\mathrm{V}_{\\text{gs}}=0.3\\mathrm{V}$</tex> and <tex>$\\mathrm{V}_{\\text{ds}}$</tex> = 0.5 V is obtained, making it suitable for LNA design for RF applications.