Giuliano Maiolini

@cti.gov.br

Assembly, Electronic Packaging and Systems Division
Centro de Tecnologia da Informação Renato Archer

Giuliano Maiolini


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https://researchid.co/giumaiolini

RESEARCH, TEACHING, or OTHER INTERESTS

Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials, Renewable Energy, Sustainability and the Environment, Engineering
3

Scopus Publications

Scopus Publications

  • Passivation Strategies for Minimizing Inversion Leakage in SiC MOS Capacitors.
    Rodrigo Reigota César, Melissa Mederos Vidal, Frederico Hummel Cioldin, Giuliano Maiolini, Renato A. Minamisawa, Marcos Vinicius Puydinger dos Santos, José Alexandre Diniz
    Journal of Integrated Circuits and Systems, 2026
    In this work, MOS capacitors were developed to study the effect of thin SiO₂ films at the TiO₂/SiC interface. This thin layer aims to reduce the leakage current observed in capacitors with TiO₂ and potentially serves as a passivation layer for the SiC substrate, thereby decreasing the charge density at the interface. SiO₂ films of thicknesses of 2 nm and 10 nm and a 50 nm-thick TiO₂ film were used. Structural characterization revealed that the SiO₂ films are silicon-rich, while the TiO₂ film is titanium-rich. Raman and FTIR analyses of the TiO₂ film deposited on SiC showed that the film exhibits an anatase crystalline structure. Electrical characterization confirmed that the 2 nm-thick SiO₂ film reduced the device leakage current by two orders of magnitude, although it was ineffective in passivating the SiC surface. On the other hand, passivation with N2+O2 plasma yielded a superior-quality interface, as evidenced by an almost null C-V hysteresis, indicating a significant reduction of trapped charges at the interface.
  • Leakage Current in SiC MOS Capacitors with PECVD SiO2 Passivation
    César R. R., Mederos M., Cioldin F. H., Maiolini G., Minamisawa R. A., Puydinger dos Santos M. V., Diniz J. A.
    2025 39th Symposium on Microelectronics Technology and Devices Sbmicro 2025, 2025
    In this work, MOS capacitors were developed to study the effect of thin <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{SiO}_{2}$</tex> films at the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2} / \text{SiC}$</tex> interface. This thin layer aims to reduce the leakage current observed in capacitors with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> and potentially serves as a passivation layer for the SiC substrate, thereby decreasing the charge density at the interface. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{SiO}_{2}$</tex> films of thicknesses of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{2} \mathbf{~ n m}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1 0}$</tex> nm and a 50 nm -thick <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> film were used. Structural characterization revealed that the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{SiO}_{2}$</tex> films are silicon-rich, while the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> film is titanium-rich. Raman and FTIR analyses of the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> film deposited on SiC showed that the film exhibits an anatase crystalline structure. Electrical characterization confirmed that the 20 nm-thick <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{SiO}_{2}$</tex> film reduced the device leakage current by two orders of magnitude, although it was ineffective in passivating the SiC surface.
  • Assembly of Piezoelectric MEMS Vibration Sensor for Cochlear Implant
    Ricardo Cotrin Teixeira, Alexander Flacker, Giuliano Maiolini, Rodrigo Reigota Cesar, Guilherme Cartagena Miron, Julio Apolinario Cordioli
    2023 37th Symposium on Microelectronics Technology and Devices Sbmicro 2023, 2023
    The use of implantable devices for biomedical applications has been made possible by the ubiquity of vibration sensors and accelerometers, coupled with advances in microfabrication technologies. Among these devices, implantable auditory prostheses, such as hearing aids and cochlear implants, have emerged as a viable alternative to traditional external devices, which can cause discomfort to users. To meet the requirements for implantable auditory devices, a piezoelectric microelectromechanical systems (MEMS) accelerometer has been developed, which includes an AlN (Aluminun Nitrate) piezoelectric signal generator attached to a silicon proof mass. This paper presents the fabrication route developed at the Assembly, Packaging and System Integration Division from Renato Archer Center for Information Technology (DIMES/CTI), including anisotropic etching of silicon cavities, flip chip assembly and signal extraction routes, to seal a silicon proof mass sample (accelerometer) fabricated by a third party.