Control of 5φ induction motor for electric vehicles Mujahid Irfan, Sudhakar Angatha, Shriram Rangarajan, Sruthi Nookala, Mahesh Ontera, Bhavan Thummala, Suresh Badhavath, Chandu Prasad, Nandam, and Sunil Page AIP Publishing
Communication Protocols for Electric Vehicles: A Comprehensive Analysis Zaheda Sultana, CH Hussaian Basha, and Mohammed Mujahid Irfan IEEE Electric vehicles (EV s) Significantly contribute to sustainable development goals (SDGs) by mitigating emissions, enhancing air quality, fostering renewable energy use, generating green employment, and facilitating access to sustainable transportation. In electric vehicles (EV s), multiple components require communication protocols to enable synchronization of subsystems such as battery management and charging infrastructure and ensure optimal efficiency and interoperability. There is a wide adoption of Electric vehicles (EV s) worldwide to create a sustainable environment. Based upon the above aspects, this article presents a thorough literature review of the communication protocols for EV s, where the key technical components of the EV ecosystem are summarized in detail. Further, this study presented an overview of communication protocols for EV s, covering front- end and back-end protocols. The significance of protocols in EV charging is discussed, including aspects like interoperability, communication and data exchange, plug- and-charge capability, monitoring, and smart charging. The findings of the study conclude that this communication protocol is used to integrate electric vehicles (EVs) into transportation networks. Front-end and back-end protocols govern the communication between electric vehicles (EVs) and charging stations, as well as between the infrastructure and third-party operators. Protocols like ISO 15118, OCPP, IEC 61850, and others are used for different purposes. Protocols are based on their openness, compatibility, maturity, and market adoption to determine their adequacy for adoption in the EV business. The review's novelty comes from its comprehensive analysis of communication protocols for electric vehicles (EV s), which encompasses both detailed elements and performing outcomes.
Control of DSTATCOM Using ANN-BP Algorithm for the Grid Connected Wind Energy System Mohammad Mujahid Irfan, Sushama Malaji, Chandrashekhar Patsa, Shriram S. Rangarajan, and S. M. Suhail Hussain MDPI AG Green energy sources are implemented for the generation of power due to their substantial advantages. Wind generation is the best among renewable options for power generation. Generally, the wind system is directly connected with the power network for supplying power. In direct connection, there is an issue of managing power quality (PQ) concerns such as voltage sag, swells, flickers, harmonics, etc. In order to enhance the PQ in a power network with a wind energy conversion system (WECS), peripheral compensation is needed. In this paper, we highlight a novel control technique to improve the PQ in WECS by adopting an Artificial Neural Network (ANN)-based Distribution Static Compensator (DSTATCOM). In our proposed approach, an online learning-based ANN Back Propagation (BP) model is used to generate the gate pulses of the DSTATCOM, which mitigate the harmonics at the grid side. It is modelled using the MATLAB platform and the total harmonic distortion (THD) of the system is compared with and without DSTATCOM. The harmonics at the source side decreased to less than 5% and are within the IEEE limits. The results obtained reveal that the proposed online learning-based ANN-BP is superior in nature.
Design of Low Power 4-Bit Baugh-Wooley Multiplier using 1-Bit Mirror and Approximate Full Adders Abhinav Rampeesa, Ponnaboina Akhila, Mohammed Irfan, Shashank Rebelli, Laxman Raju Thoutam, and J. Ajayan IEEE The majority of the most recent data-driven advancements, notably artificial-intelligence(AI) and machine-learning (ML) depend heavily on binary arithmetic computations. This paper focuses on the design and analysis of a reliable, low-power 4-bit Baugh-Wooley (BW) multiplier employing the high performance 1-bit mirror full-adder (MFA) and approximate full-adder (AFA). For a various technological nodes varying from 16 nm to 90 nm, the effectiveness of the proposed 4-bit BW multiplier is thoroughly investigated for power and delay parameters at different operating voltages (0.6 V – 1.0 V). The proposed 4-bit BW multiplier at a 16-nm CMOS process employing an MFA circuit consumes a minimal power of 37.5 μW at an operating voltage of 0.7 V and a nominal temperature of 300C, whereas it consumes 35.5 μW for a combined MFA and AFA circuits. The power consumption increases linearly with operating voltage for the designed BW multiplier employing the two high performance full-adder circuits. The proposed 4-bit BW multiplier at 16-nm CMOS process has a delay of 104 ps at 0.7 V. The simulation result analysis indicates the combination of MFA and AFA circuits in the design of low-power 4-bit Baugh-Wooley multipliers, even though there exists a partial error at the output of multiplier MSB.